Datasheet

Appendix B 2 X BTL AD (Default: AD mode)
www.ti.com Appendix B
Following initial scripts may also be found on the installation CD or TI Web site. The following scripts
use .ini format where the first column is type of write command ("01" means single byte, "02"
means multi-byte, "00" means comment), the following column is the I2C address and then
followed by data(s).
01 1B 00 Oscillator Trim
01 03 A0 System Control Register 1
01 04 05 Serial Data Interface Register
01 06 00 Soft Mute Register
01 07 00 Master Volume Register (0xFF = Mute)
01 08 30 Channel 1 Volume
01 09 30 Channel 2 Volume
01 0A 30 Channel 3 Volume
01 0B 30 Channel 4 Volume
01 0C 30 Channel 5 Volume
01 0D 30 Channel 6 Volume
01 0E 91 Micro Register
01 10 02 Modulation Limit
01 19 30 Shutdown Group Resister
01 1A 0F Split Capacitor Charge Period
01 1C 02 Back-end Error Register
00 01 (Below) Input Mux Register
02 20 00 01 77 72
00 01 (Below) Downmix Register
02 21 00 00 40 03
00 01 (Below) AM Mode Register
02 22 00 00 00 00
00 01 (Below) Biquad1 Coeff
02 23 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 01 (Below) Biquad2 Coeff
02 24 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 01 (Below) PWM Output MUX Register (Note: Writes to this register affect Inter-Channel Delay)
02 25 01 02 13 45
00 01 (Below) 1/G
02 26 00 80 00 00
00 01 (Below) Scale = 1/(1-1/G)
02 28 00 80 00 00
01 11 AC Inter-Channel Delay Channel 1
01 12 54 Inter-Channel Delay Channel 2
01 13 AC Inter-Channel Delay Channel 3
01 14 54 Inter-Channel Delay Channel 4
01 15 00 Inter-Channel Delay Channel 5
01 16 00 Inter-Channel Delay Channel 6
01 17 00 Offset Register (Absolute Delay)
01 05 00 System Control Register 2 (active)
SLOU223A – December 2008 – Revised January 2009 2 X BTL AD (Default: AD mode) 21
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