Datasheet
SDIN1
SDIN2
MCLK
SCLK
LRCLK
SUB_PWM–
Serial
Audio
Port
Gain
Control
Sub
Protection
Logic
SUB_PWM+
ClickandPopControl
Inter-ChannelDelay
4
Order
th
Noise
Shaper
and
PWM
S
R
C
SampleRate
Autodetect
andPLL
Trimmed
On-ChipOSC
Microcontroller
Based
System
Control
TerminalControl
OUT_A
OUT_B
2 HB´
FET Out
OUT_C
OUT_D
2 HB´
FET Out
B0262-04
R
L
TAS5701
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SLOS559A –JUNE 2008–REVISED AUGUST 2010
FUNCTIONAL BLOCK DIAGRAM
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