Datasheet

+50 V
(J15)
LEFT
SPEAKER
OUTPUT
(J12)
RIGHT
SPEAKER
OUTPUT
(J14)
(SW1)
(SW2)
PBTL
PBTLBTL
BTL
TAS5518
INPUT SIGNAL& CONTROL
INTERFACE(J10)
+12VFan
OUTPUT
CONTROL
(J22)
+12VFan
Regulator
+3.3V
Regulator
OUTPUT STAGE
CHANNEL RiGHT
OUTPUT STAGE
CHANNEL LEFT
www.ti.com Quick Setup Guide
1.2 PCB Key Map
Physical structure for the TAS5631PHD2EVM is illustrated in Figure 2.
Figure 2. Physical Structure for the TAS5631PHD2EVM (Approximate Layout)
2 Quick Setup Guide
This section describes the TAS5631PHD2EVM board in regards to power supplies and system interfaces.
The section provides information regarding handling and unpacking, absolute operating conditions, and a
description of the factory default switch and jumper configuration.
This section also provides a step-by-step guide to configuring the TAS5631PHD2EVM for device
evaluation.
2.1 Electrostatic Discharge Warning
Many of the components on the TAS5631PHD2EVM are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling
the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures can result in damage to EVM
components.
5
SLOU275A–December 2009–Revised May 2010 TAS5631PHD2EVM
Copyright © 2009–2010, Texas Instruments Incorporated