Datasheet

TAS5631
www.ti.com SLES221C –JULY 2009–REVISED APRIL 2010
AUDIO SPECIFICATION (PBTL)
Audio performance is recorded as a chipset consisting of a TAS5518 PWM processor (modulation index limited to 97.7%)
and a TAS5631 power stage. PCB and system configurations are in accordance with recommended guidelines. Audio
frequency = 1 kHz, PVDD_X = 50 V, GVDD_X = 12 V, R
L
= 2 Ω, f
S
= 384 kHz, R
OC
= 22 kΩ, T
C
= 75°C;
output filter: L
DEM
= 7 mH, C
DEM
= 1 mF, MODE = 101-00, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R
L
= 2 Ω, 10%, THD+N, clipped input signal 600
R
L
= 3 Ω, 10%, THD+N, clipped input signal 400
R
L
= 4 Ω, 10%, THD+N, unclipped input signal 300
P
O
Power output per channel W
R
L
= 2 Ω, 1% THD+N, unclipped input signal 480
R
L
= 3 Ω, 1% THD+N, unclipped input signal 310
R
L
= 4 Ω, 1% THD+N, unclipped input signal 230
THD+N Total harmonic distortion + noise 1 W 0.03%
V
n
Output integrated noise A-weighted, TAS5518 modulator 170 mV
SNR Signal-to-noise ratio
(1)
A-weighted, TAS5518 modulator 103 dB
A-weighted, input level –60 dBFS using
DNR Dynamic range 103 dB
TAS5518 modulator
P
idle
Power dissipation due to idle losses (I
PVDD_X
) P
O
= 0, 4 channels switching
(2)
3.7 W
(1) SNR is calculated relative to 1% THD-N output level.
(2) Actual system idle losses are affected by core losses of output inductors.
ELECTRICAL CHARACTERISTICS
PVDD_X = 50V, GVDD_X = 12 V, VDD = 12V, T
C
(case temperature) = 75°C, f
S
= 384 kHz, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INTERNAL VOLTAGE REGULATOR AND CURRENT CONSUMPTION
Voltage regulator, only used as reference
VREG VDD = 12 V 3 3.3 3.6 V
node, VREG
VI_CM Analog comparator reference node, VI_CM 1.5 1.75 1.9 V
Operating, 50% duty cycle 22.5
I
VDD
VDD supply current mA
Idle, reset mode 22.5
50% duty cycle 12.5
I
GVDD_x
Gate-supply current per half-bridge mA
Reset mode 1.5
50% duty cycle without output filter or
19.5 mA
load
I
PVDD_x
Half-bridge idle current
Reset mode, no switching 750 mA
OUTPUT-STAGE MOSFETs
Drain-to-source resistance, low side (LS) T
J
= 25°C, excludes metallization 60 100 mΩ
resistance,
R
DS(on)
Drain-to-source resistance, high side (HS) 60 100 mΩ
GVDD = 12 V
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Product Folder Link(s): TAS5631
Not Recommended For New Designs