Datasheet

TAS5631B
www.ti.com SLES263C –NOVEMBER 2010–REVISED SEPTEMBER 2012
MODE SELECTION PINS
MODE PINS
OUTPUT
PWM INPUT
(1)
DESCRIPTION
CONFIGURATION
M3 M2 M1
0 0 0 2N 2 × BTL AD mode
0 0 1 — — Reserved
0 1 0 2N 2 × BTL BD mode
0 1 1 1N 1 × BTL +2 × SE AD mode
1 0 0 1N 4 × SE AD mode
INPUT_C
(2)
INPUT_D
(2)
2N
1 0 1 1 x PBTL 0 0 AC mode
IN
1 0 BD mode
1 1 0
Reserved
1 1 1
(1) The 1N and 2N naming convention is used to indicate the number of PWM lines to the power stage per channel in a specific mode.
(2) INPUT_C and INPUT_D are used to select between a subset of AD and BD mode operations in PBTL mode.
THERMAL INFORMATION
TAS5631B
THERMAL METRIC
(1)(2)
UNITS
PHD (64 Pins) DKD (44 Pins)
θ
JA
Junction-to-ambient thermal resistance 8.5 9.3
θ
JCtop
Junction-to-case (top) thermal resistance 0.2 0.6
θ
JB
Junction-to-board thermal resistance 20.6 3.7
°C/W
ψ
JT
Junction-to-top characterization parameter 0.2 1.3
ψ
JB
Junction-to-board characterization parameter 0.73 3.5
θ
JCbot
Junction-to-case (bottom) thermal resistance 8.2 19.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Thermal model data was performed using a 40 x 40 x 90mm heat-sink
Table 1. ORDERING INFORMATION
(1)
T
A
PACKAGE DESCRIPTION
0°C–70°C TAS5631BPHD 64-pin HTQFP
0°C–70°C TAS5631BDKD 44-pin PSOP3
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
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