Datasheet

TAS5630B
SLES217C –NOVEMBER 2010–REVISED SEPTEMBER 2012 www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
VALUE UNIT
VDD to AGND –0.3 to 13.2 V
GVDD to AGND –0.3 to 13.2 V
PVDD_X to GND_X
(2)
–0.3 to 69 V
OUT_X to GND_X
(2)
–0.3 to 69 V
BST_X to GND_X
(2)
–0.3 to 82.2 V
BST_X to GVDD_X
(2)
–0.3 to 69 V
VREG to AGND –0.3 to 4.2 V
GND_X to GND –0.3 to 0.3 V
GND_X to AGND –0.3 to 0.3 V
OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO–, FREQ_ADJ, VI_CM, C_STARTUP, PSU_REF to AGND –0.3 to 4.2 V
INPUT_X –0.3 to 7 V
RESET, SD, OTW1, OTW2, CLIP, READY to AGND –0.3 to 7 V
Continuous sink current (SD, OTW1, OTW2, CLIP, READY) 9 mA
Operating junction temperature range, T
J
0 to 150 °C
Storage temperature, T
stg
–40 to 150 °C
Human-body model
(3)
(all pins) ±2 kV
Electrostatic discharge
Charged-device model
(3)
(all pins) ±500 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) These voltages represents the dc voltage + peak ac waveform measured at the terminal of the device in all conditions.
(3) Failure to follow good anti-static ESD handling during manufacture and rework contributes to device malfunction. Ensure operators
handling the device are adequately grounded through the use of ground straps or alternative ESD protection.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
PVDD_x Half-bridge supply DC supply voltage 25 50 52.5 V
GVDD_x Supply for logic regulators and gate-drive circuitry DC supply voltage 10.8 12 13.2 V
VDD Digital regulator supply voltage DC supply voltage 10.8 12 13.2 V
R
L
(BTL) 3.5 4
Output filter according to schematics in the
R
L
(SE)
(2)
Load impedance
(1)
1.8 2 Ω
application information section
R
L
(PBTL)
(2)
2.4 3
L
OUTPUT
(BTL) 7 10
L
OUTPUT
(SE)
(2)
Output filter inductance
(1)
Minimum output inductance at I
OC
7 15 μH
L
OUTPUT
(PBTL)
(2)
7 10
Nominal 385 400 415
PWM frame rate selectable for AM interference
f
PWM
AM1 315 333 350 kHz
avoidance; 1% resistor tolerance.
AM2 260 300 335
Nominal; master mode 9.9 10 10.1
R
FREQ_ADJ
PWM frame-rate-programming resistor AM1; master mode 19.8 20 20.2 kΩ
AM2; master mode 29.7 30 30.3
Voltage on FREQ_ADJ pin for slave mode
V
FREQ_ADJ
Slave mode 3.3 V
operation
64-pin QFP package (PHD) 22 33
Overcurrent-protection-programming resistor,
cycle-by-cycle mode
44-Pin PSOP3 package (DKD) 24 33
R
OCP
kΩ
Overcurrent-protection-programming resistor,
PHD or DKD 47 68
latching mode
T
J
Junction temperature 0 125 °C
(1) Values are for actual measured impedance over all combinations of tolerance, current and temperature and not simply the component
rating.
(2) See additional details for SE and PBTL in the System Design Considerations section.
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