Datasheet

TAS5630B
SLES217C –NOVEMBER 2010–REVISED SEPTEMBER 2012 www.ti.com
filter. The typical duration is <15 ms/μF. While the PPSC detection is in progress, SD is kept low, and the device
does not react to changes applied to the RESET pins. If no shorts are present the PPSC detection passes, and
SD is released, a device reset does not start a new PPSC detection. PPSC detection is enabled in BTL and
PBTL output configurations; the detection is not performed in SE mode. To make sure the PPSC detection
system is not tripped, it is recommended not to insert resistive load between OUT_X and GND_X or PVDD_X.
OVERTEMPERATURE PROTECTION
The two different package options have individual overtemperature protection schemes.
PHD Package:
The TAS5630B PHD package option has a three-level temperature-protection system that asserts an active-low
warning signal (OTW1) when the device junction temperature exceeds 100°C (typical), (OTW2) when the device
junction temperature exceeds 125°C (typical) and, if the device junction temperature exceeds 155°C (typical), the
device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (Hi-Z)
state and SD being asserted low. OTE is latched in this case. To clear the OTE latch, RESET must be asserted.
Thereafter, the device resumes normal operation. For highest reliability, the RESET should not be asserted until
OTW1 has cleared.
DKD Package:
The TAS5630B DKD package option has a two-level temperature-protection system that asserts an active-low
warning signal (OTW) when the device junction temperature exceeds 125°C (typical) and, if the device junction
temperature exceeds 155°C (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs
being set in the high-impedance (Hi-Z) state and SD being asserted low. OTE is latched in this case. To clear the
OTE latch, RESET must be asserted. It is recommended to wait until OTW has cleared before asserting RESET.
Thereafter, the device resumes normal operation.
UNDERVOLTAGE PROTECTION (UVP) AND POWER-ON RESET (POR)
The UVP and POR circuits of the TAS5630B fully protect the device in any power-up/down and brownout
situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are
fully operational when the GVDD_X and VDD supply voltages reach the levels stated in the Electrical
Characteristics table. Although GVDD_X and VDD are independently monitored, a supply voltage drop below the
UVP threshold on any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-
impedance (Hi-Z) state and SD being asserted low. The device automatically resumes operation when all supply
voltages have increased above the UVP threshold.
DEVICE RESET
When RESET is asserted low, all power-stage FETs in the four half-bridges are forced into a high-impedance
(Hi-Z) state.
In BTL modes, to accommodate bootstrap charging prior to switching start, asserting the reset input low enables
weak pulldown of the half-bridge outputs. In the SE mode, the output is forced into a high-impedance state when
asserting the reset input low. Asserting reset input low removes any fault information to be signaled on the SD
output; i.e., SD is forced high. A rising-edge transition on reset input allows the device to resume operation after
an overload fault. To ensure thermal reliability, the rising edge of reset must occur no sooner than 4 ms after the
falling edge of SD.
SYSTEM DESIGN CONSIDERATIONS
A rising-edge transition on the reset input allows the device to execute the startup sequence and starts switching.
Apply audio only when the state of READY is high; that starts and stops the amplifier without having audible
artifacts that are heard in the output transducers. If an overcurrent protection event is introduced, the READY
signal goes low; hence, filtering is needed if the signal is intended for audio muting in non-microcontroller
systems.
The CLIP signal indicates that the output is approaching clipping. The signal can be used either to activate a
volume decrease or to signal an intelligent power supply to increase the rail voltage from low to high for optimum
efficiency.
The device inverts the audio signal from input to output.
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