Datasheet

+50 V
(J15)
LEFT
SPEAKER
OUTPUT
(J12)
RIGHT
SPEAKER
OUTPUT
(J14)
(SW1)
(SW2)
PBTL
PBTLBTL
BTL
TAS5518
INPUT SIGNAL& CONTROL
INTERFACE(J10)
+12VFan
OUTPUT
CONTROL
(J22)
+12VFan
Regulator
+3.3V
Regulator
OUTPUT STAGE
CHANNEL RiGHT
OUTPUT STAGE
CHANNEL LEFT
Quick Setup Guide www.ti.com
1.2 PCB Key Map
Physical structure for the TAS5612/14PHD2EVM is illustrated in Figure 2.
Figure 2. Physical Structure for the TAS5612/14PHD2EVM (Approximate Layout)
2 Quick Setup Guide
This section describes the TAS5612/14PHD2EVM board in regards to power supplies and system
interfaces. The section provides information regarding handling and unpacking, absolute operating
conditions, and a description of the factory default switch and jumper configuration.
This section also provides a step-by-step guide to configuring the TAS5612/14PHD2EVM for device
evaluation.
2.1 Electrostatic Discharge Warning
Many of the components on the TAS5612/14PHD2EVM are susceptible to damage by electrostatic
discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking
and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures can result in damage to EVM
components.
4
TAS5612/14PHD2EVM SLOU285–December 2009
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