Datasheet
SE/ BTL CONTROL PIN
HIZ PIN
RESET OPERATION
USING LOW-ESR CAPACITORS
SHORT-CIRCUIT PROTECTION
THERMAL PROTECTION
TAS5602
SLAS593B – JUNE 2008 – REVISED NOVEMBER 2008 ...................................................................................................................................................
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The circuit is designed for a C
BYP
value of 1 µ F for best pop performance. The input capacitors should have the
same value. A ceramic or tantalum low-ESR capacitor is recommended.
If the SE/ BTL CONTROL pin is pulled low (tied to ground), the start-up time is typically 420 msec which is
optimized for the bridge tied load (BTL) output configuration. If the SE/ BTL pin is pulled high, the start-up time is
controlled by the V
BYP
Capacitor as described in the previous section. For a value of C
BYP
= 1 µ F, the start-up
time is typically 800 msec. This gives a smooth, pop-free startup for single-ended (SE) output stages.
The HIZ pin can be used to immediately take the Class D output H Bridges to a Hi-Z state in the case of an
unexpected power down situation. This allows the user to control the amplifier turn-off quickly if needed. Use a
power supply which drops relatively quickly to pull the HIZ pin low before the PVCC reaches the UVLO voltage of
8.4 V (typ.) to avoid popping at power down.
The TAS5602 employs a RESET mode of operation designed to reduce supply current (I
CC
) to the absolute
minimum level during periods of nonuse for power conservation. The RESET input terminal should be held high
(see specification table for trip point) during normal operation when the amplifier is in use. Pulling RESET low
causes the outputs to ramp to GND and the amplifier to enter a low-current state. Never leave RESET
unconnected, because amplifier operation would be unpredictable.
For the best power-up pop performance, place the amplifier in the RESET mode prior to applying the
power-supply voltage.
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor
can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor
minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance,
the more the real capacitor behaves like an ideal capacitor.
The TAS5602 has short-circuit protection circuitry on the outputs that prevents damage to the device during
output-to-output shorts and output-to-GND shorts after the filter and output capacitor (at the speaker terminal.)
Directly at the device terminals, the protection circuitry prevents damage to device during output-to-output,
output-to-ground, and output-to-supply. When a short circuit is detected on the outputs, the part immediately
disables the output drive. Normal operation is restored once the fault is cleared by cycling the RESET pin.
The FAULT will transition low when a short is detected. The FAULT pin will be cleared on the rising edge of
RESET after RESET is cycled low to high.
Thermal protection on the TAS5602 prevents damage to the device when the internal die temperature exceeds
150 ° C. There is a ± 15 ° C tolerance on this trip point from device to device. Once the die temperature exceeds the
thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not a latched
fault. The thermal fault is cleared once the temperature of the die is reduced by 20 ° C. The device begins normal
operation at this point with no external system interaction.
Thermal protection fault is NOT reported on the FAULT terminal.
A THERM_WARN terminal can be used to monitor when the internal device temperature reaches 125 ° C. The
terminal will transition low at this point and transition back high after the device cools approximately 20 ° C. It is
not necessary to cycle RESET to clear this warning flag.
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