Datasheet

TAS5548
SLES270 –NOVEMBER 2012 www.ti.com
11.21 Bass Mixer Registers (0x49–0x50)
Registers 0x49–0x50 provide configuration control for bass mangement.
Each gain coefficient is in 28-bit (5.23) format, so 0x80 0000 is a gain of 1. Each gain coefficient is written
as a 32-bit word with the upper four bits reserved.
There is no negative value available. The mixer cannot phase invert.
Table 11-24. Bass Mixer Register Format
SUB- TOTAL REGISTER
DESCRIPTION OF CONTENTS DEFAULT STATE
ADDRESS BYTES NAME
0x49 4 ipmix_1_to_ch8 Input mixer 1 to Ch8 mixer coefficient (default = 0) 0000 0000
u[31:28], ipmix18[27:24], ipmix18[23:16], ipmix18[15:8],
ipmix18[7:0]
0x4A 4 ipmix_2_to_ch8 Input mixer 2 to Ch8 mixer coefficient (default = 0) 0000 0000
u[31:28], ipmix28[27:24], ipmix28[23:16], ipmix28[15:8],
ipmix28[7:0]
0x4B 4 ipmix_7_to_ch12 Ch7 biquad-2 output to Ch1 mixer and Ch2 mixer coefficient 0000 0000
(default = 0)
u[31:28], ipmix72[27:24], ipmix72[23:16], ipmix72[15:8],
ipmix72[7:0]
0x4C 4 Ch7_bp_bq2 Ch7 biquad-2 bypass coefficient (default = 0) 0000 0000
u[31:28], ch7_bp_bq2[27:24], ch7_bp_bq2[23:16],
ch7_bp_bq2[15:8], ch7_bp_bq2[7:0]
0x4D 4 Ch7_bq2 Ch7 biquad-2 inline coefficient (default = 1) 0080 0000
u[31:28], ch6_bq2[27:24], ch6_bq2[23:16], ch6_bq2[15:8],
ch6_bq2[7:0]
0x4E 4 ipmix_8_to_ch12 Ch8 biquad-2 output to Ch1 mixer and Ch2 mixer coefficient 0000 0000
(default = 0)
u[31:28], ipmix8_12[27:24], ipmix8_12[23:16],
ipmix8_12[15:8], ipmix8_12[7:0]
0x4F 4 Ch8_bp_bq2 Ch8 biquad-2 bypass coefficient (default = 0) 0000 0000
u[31:28], ch8_bp_bq2[27:24], ch8_bp_bq2[23:16],
ch8_bp_bq2[15:8], ch8_bp_bq2[7:0]
0x50 4 Ch8_bq2 Ch8 biquad-2 inline coefficient (default = 1) 0080 0000
u[31:28], ch7_bq2[27:24], ch7_bq2[23:16], ch7_bq2[15:8],
ch7_bq2[7:0]
11.22 Biquad Filter Register (0x51–0x88)
Table 11-25. Biquad Filter Register Format
I
2
C TOTAL REGISTER DEFAULT
DESCRIPTION OF CONTENTS
SUBADDRESS BYTES NAME STATE
0x51–0x57 20/reg. Ch1_bq[1:7] Ch1 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x58–0x5E 20/reg. Ch2_bq[1:7] Ch2 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x5F–0x65 20/reg. Ch3_bq[1:7] Ch3 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x66–0x6C 20/reg. Ch4_bq[1:7] Ch4 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x6D–0x73 20/reg. Ch5_bq[1:7] Ch5 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x74–0x7A 20/reg. Ch6_bq[1:7] Ch6 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x7B–0x81 20/reg. Ch7_bq[1:7] Ch7 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
0x82–0x88 20/reg. Ch8_bq[1:7] Ch8 biquads 1–7. See Table 11-26 for bit definition. See Table 11-26
90 Serial-Control Interface Register Definitions Copyright © 2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TAS5548