Datasheet

TAS5548
www.ti.com
SLES270 NOVEMBER 2012
11.4 System Control Register 2 (0x04)
Bit D3 is reserved.
Table 11-4. System Control Register-2 Format
D7 D6 D5 D4 D3 D2 D1 D0 Function
0 Unmute Threshold 6 dB over Input Threshold
1 Unmute Threshold equal to Input Threshold
0 All channel auto-mute timeout disable
1 All channel auto-mute timeout enable
0 Disable channel group
1 Enable channel group
0 Enable DAP automute
1 Disable DAP automute
0 0 Normal Mode
1 Line out Mode
1 ASEL_EMO2 pin is input
0 ASEL_EMO2 pin is out output
0 No Output Downmix on SDOUT(TX SAP Disable)
1 Output Downmix on SDOUT. Dolby-out is enabled when this bit is
set and system is in normal mode
11.5 Channel Configuration Control Registers (0x05–0x0C)
Channels 1, 2, 3, 4, 5, 6, 7, and 8 are mapped into 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, and 0x0C,
respectively.
Table 11-5. Channel Configuration Control Register Format
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 Disable back-end reset sequence if all channels set to disable.
1 Enable back-end reset sequence.
0 RESERVED
1 RESERVED
0 RESERVED
1 RESERVED
0 Normal Back-End Polarity
1 Switches PWM+ and PWM– and inverts audio signal
0 RESERVED
1 RESERVED
0 RESERVED
1 RESERVED
0 RESERVED
1 RESERVED
Copyright © 2012, Texas Instruments Incorporated Serial-Control Interface Register Definitions 77
Submit Documentation Feedback
Product Folder Links: TAS5548