Datasheet

TAS5548

SLES270 –NOVEMBER 2012

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11.2 Error Status Register (0x02)

Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software

must clear the register (write zeroes) and then read them to determine if there are any persistent errors.

Bits D7-D4 are reserved.

Table 11-2. Error Status Register (0x02)

D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION

– – – – 1 – – – Frame Slip

– – – – – 1 – – Clip Indicator

– – – – – – 1 – Faultz

0 0 0 0 0 0 0 0 No Errors

11.3 System Control Register 1 (0x03)

Bits D1 and D0 are Reserved.

Table 11-3. System Control Register-1 Format

D7 D6 D5 D4 D3 D2 D1 D0 Function

0 – – – – – – – PWM high pass disabled

1 – – – – – – – PWM high pass enabled

– 1 – – – – – – PSVC HIZ Enable

– 0 – – – – – – PSVC HIZ Disable

– – 0 – – – – – Soft Unmute on Recovery from Clock Error

– – 1 – – – – – Hard Unmute on Recovery from Clock Error

– – – 0 – – – – All Channel enable

– – – 1 – – – – All Channel Shutdown

– – – – 0 – – – Enable Clock Auto Detect (Always set to 0 for correct operation)

– – – – 1 – – – Disable Clock Auto Detect

– – – – – 0 – – PWM MidZ Enable (No By-pass)

– – – – – 1 – – PWM MidZ Bypass

– – – – – – 0 0 Reserved: Do not change B0 & B1 from 00.

– – – – – – 0 1 Reserved:

– – – – – – 1 0 Reserved:

– – – – – – 1 1 Reserved:

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