Datasheet

TAS5548
www.ti.com SLES270 –NOVEMBER 2012
10 Serial-Control I
2
C Register Summary
The TAS5548 slave write address is 0x36 and the read address is 0x37. See Serial-Control Interface
Register Definitions, Section 11 for complete bit definitions.
Note: Default stat is read immediately after device reset.
TOTAL
I
2
C
REGISTER FIELDS DESCRIPTION OF CONTENTS DEFAULT STATE (hex)
BYTES
SUBADDRESS
0x01 1 General status register ID code for the TAS5548 04
0x02 1 Error status register CLIP and frame slip errors 00
PWM high pass, clock set, unmute
0x03 1 System control register 1 B0
select, PSVC select
Automute, Shutdown, Line out, 03
0x04 1 System control register 2
SDOUT
Channel configuration Configure channels 1, 2, 3, 4, 5, 6, 7,
0x05–0x0C 1/reg. E0
control registers and 8
Headphone configuration
0x0D 1 Configure headphone output 00
control register
0x0E 1 Serial data interface control Set serial data interface to right- 55
register
justified, I
2
S, or left-justified.
0x0F 1 Soft mute register Soft mute for channels 1, 2, 3, 4, 5, 6, 00
7, and 8
0x10 1 Energy Managers Register SeeTable 11-9 0A
0x11 1 Reserved Do not Read or Write RESERVED
0x12 1 Oscillator Trim See 82
0x13 1 Reserved Do not Read or Write RESERVED
0x14 1 Automute control register Set automute delay and threshold 44
0x15 1 Automute PWM threshold Set PWM automute threshold; set 02
and back-end reset period back-end reset period
register
0x16 1 Modulation Limit Reg 77
Set modulation index ch1 & ch2
(ch1 & 2)
0x17 1 Modulation Limit Reg 77
Set Modulation Index ch3 & ch4
(ch3 & 4)
0x18 1 Modulation Limit Reg 77
Set Modulation Index ch5 & ch6
(ch5 & 6)
0x19 1 Modulation Limit Reg Set Modulation Index ch7 & ch8 77
(ch7 & 8)
0x1A 1 Reserved Do not Read or Write RESERVED
0x1B 1 IC Delay Channel 0 SeeTable 11-14 80
0x1C 1 IC Delay Channel 1 SeeTable 11-14 00
0x1D 1 IC Delay Channel 2 SeeTable 11-14 C0
0x1E 1 IC Delay Channel 3 SeeTable 11-14 40
0x1F 1 IC Delay Channel 4 SeeTable 11-14 A0
0x20 1 IC Delay Channel 5 SeeTable 11-14 20
0x21 1 IC Delay Channel 6 SeeTable 11-14 E0
0x22 1 IC Delay Channel 7 SeeTable 11-14 60
0x23 1 IC Offset Delay Reg SeeTable 11-14 00
0x24 1 PWM sequence timing See 0F
0x25 1 PWM and Energy Manager SeeTable 11-16 80
Control Register
0x26 1 Reserved Do not Read or Write RESERVED
0x27 1 Individual Channel SeeTable 11-17 00
Shutdown
0x28–0x2F 1 Reserved Do not Read or Write RESERVED
0x30 1 Input_Mux_ch1&2 See Table 11-18 & Table 11-19 01
0x31 1 Input_Mux_ch3&4 See Table 11-18 & Table 11-19 23
0x32 1 Input_Mux_ch5&6 See Table 11-18 & Table 11-19 45
0x33 1 Input_Mux_ch7&8 See Table 11-18 & Table 11-19 67
Copyright © 2012, Texas Instruments Incorporated 69
Serial-Control I
2
C Register Summary
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