Datasheet

t
(buf)
SCL
SDA
START Condition
STOP Condition
t
h2
t
su3
t
su2
TAS5548
www.ti.com SLES270 –NOVEMBER 2012
Timing Characteristics for I
2
C Interface Signals over recommended operating conditions (unless otherwise noted)
STANDARD MODE FAST MODE
PARAMETER TEST CONDITIONS UNIT
MIN MAX MIN MAX
20 + 0.1
t
f
Fall time of both SDA and SCL 300 300 ns
C
b
(3)
t
SU-STO
Setup time for STOP condition 4 0.6 μs
Bus free time between a STOP and
t
BUF
4.7 1.3 μs
START condition
C
b
Capacitive loads for each bus line 400 400 pF
Noise margin at the LOW level for
VnL each connected device (including 0.1 × V
DD
0.1 × V
DD
V
hysteresis)
Noise margin at the HIGH level for
V
nH
each connected device (including 0.2 × V
DD
0.2 × V
DD
V
hysteresis)
Figure 7-2. SCL and SDA Timing
Figure 7-3. START and STOP Conditions Timing
Copyright © 2012, Texas Instruments Incorporated Electrical Specifications 51
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