Datasheet

TAS5548
SLES270 NOVEMBER 2012
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5.4.2 PLL Operation
The TAS5548 uses two internal clocks generated by two internal phase-locked loops (PLLs), the digital
PLL (DPLL) and the analog PLL (APLL). The APLL provides the reference clock for the PWM. The DPLL
provides the reference clock for the digital audio processor and the control logic.
The XTAL input provides the input reference clock for the APLL. The external crystal provides a time base
to support a number of operations, including the detection of the MCLK ratio, the data rate, and clock error
conditions. The internal oscillator time base provides a constant rate for all controls and signal timing.
44 TAS5548 Controls and Status Copyright © 2012, Texas Instruments Incorporated
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