Datasheet
TAS5548
www.ti.com
SLES270 –NOVEMBER 2012
Table 5-7. Volume Ramp Periods in ms
SAMPLE RATE (kHz)
NUMBER OF STEPS
44.1, 88.2, 176.4 32, 48, 96, 192
512 46.44 42.67
1024 92.88 85.33
2048 185.76 170.67
5.3.7 Modulation Index Limit
PWM modulation is a linear function of the audio signal. When the audio signal is 0, the PWM modulation
is 50%. When the audio signal increases toward full scale, the PWM modulation increases toward 100%.
For negative signals, the PWM modulations fall below 50% toward 0%.
However, the maximum possible modulation does have a limit. During the off time period, the power stage
connected to the TAS5548 output needs to get ready for the next on-time period. The maximum possible
modulation is then set by the power stage requirements. The default modulation index limit setting is
93.7%; however, some power stages may require a lower modulation limit. See the applicable power
stage data sheet for details on setting the modulation index limit. The default setting of 93.7% can be
changed in the modulation index register (0x16).
5.4 Master Clock and Serial Data Rate Controls
On the TAS5548 the internal master clock is derived from the XTAL and the internal sampling rate will
always be 96 kHz (double speed mode) or 192 kHz (quad speed mode).
The presence of an ASRC allows a 3 wire I2S Interface on the TAS5548 (SCLK, LRCLK, DATA). The
ASRC output data rate is a function of the external crystal. (XTAL)
The TAS5548 can detect MCLK and the data rate automatically.
The MCLK frequency can be 64 f
S
, 128 f
S
, 196 f
S
, 256 f
S
, 384 f
S
, 512 f
S
, or 768 f
S
.
The TAS5548 accepts a 64 f
S
SCLK rate and a 1 f
S
LRCLK.
The clock and serial data interface have several control parameters:
• MCLK ratio (64 f
S
, 128 f
S
, 196 f
S
, 256 f
S
, 384 f
S
, 512 f
S
, or 768 f
S
) – I
2
C parameter
• Data rate (32, 44.1, 48, 88.2, 96, 176.4, 192 kHz) – I
2
C parameter
• AM mode enable/disable – I
2
C parameter
5.4.1 192kHz Native Processing Mode
The TAS5548 ASRC defaults to 96kHz at startup. This means all DAP processing and filter calculations
should be based on 96kHz sample rate.
However, the TAS5548 is also capable of processing content at 192kHz (with a reduced channel count).
To enable 192kHz native mode
• Write to 0xC5 ASRC Mode Control
• Set D20 = 1 (Serial clock output sampling rate is the internal sampling rate)
• Set D1:0 = 01 (192kHz Sampling Rate)
• 0xC5 = 0011 0001
DAP processing and filter calculations should be based on 192kHz sample rate. This mode should be
used with an incoming I2S rate of 192kHz
Copyright © 2012, Texas Instruments Incorporated TAS5548 Controls and Status 43
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