Datasheet
TAS5548
SLES270 –NOVEMBER 2012
www.ti.com
11.33 Auto Mute Behavior (0xCC)
Table 11-42. Auto Mute Behavior
D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION
Reserved
D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION
Reserved
D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION
0 Disable noise shaper on auto mute
1 Do not disable noise shaper on auto mute
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 Do not stop PWM on auto mute (Stay at duty 50:50)
1 Stop PWM on auto mute
11.34 PSVC Volume Biquad Register (0xCF)
Each gain coefficient is in 28-bit (5.23) format, so 0x80 0000 is a gain of 1. Each gain coefficient is written
as a 32-bit word with the upper four bits not used. Note that this register should be used only with the
PSVC feature its use is not required. For systems not using this feature, it is recommended that this
biquad be set to all-pass (default).
Table 11-43. Volume Biquad Register Format (Default = All-Pass)
DEFAULT GAIN COEFFICIENT VALUES
DESCRIPTION REGISTER FIELD CONTENTS
DECIMAL HEX
b
o
coefficient u[31:28], b0[27:24], b0[23:16], b0[15:8], b0[7:0] 1.0 0080 0000
b
1
coefficient u[31:28], b1[27:24], b1[23:16], b1[15:8], b1[7:0] 0.0 0000 0000
b
2
coefficient u[31:28], b2[27:24], b2[23:16], b2[15:8], b2[7:0] 0.0 0000 0000
a
1
coefficient u[31:28], a1[27:24], a1[23:16], a1[15:8], a1[7:0] 0.0 0000 0000
a
2
coefficient u[31:28], a2[27:24], a2[23:16], a2[15:8], a2[7:0] 0.0 0000 0000
11.35 Volume, Treble, and Bass Slew Rates Register (0xD0)
Table 11-44. Volume Gain Update Rate (Slew Rate)
D31 D30 D29–D11 D10 D9 D8 FUNCTION
- - - 0 0 0 512 step update at 4 Fs, 21.3 ms at 96 kHz
- - - 0 0 1 1024 step update at 4 Fs, 42.65 ms at 96 kHz
- - - 0 1 0 2048 step update at 4 Fs, 85 ms at 96 kHz
- - - 0 1 1 2048 step update at 4 Fs, 85 ms at 96 kHz
- - - 1 0 0 256 step update at 4 Fs, 10.65 ms at 96kHz
Abort volume ramp if there is a change in the volume of any
1 0 0 - - -
channel
0 1 0 - - - Enable PWM shutdown on headphone change
Table 11-45. Treble and Bass Gain Step Size (Slew Rate)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 0 0 0 0 0 0 0 No operation
0 0 0 0 0 1 0 0 Minimum rate – Updates every 0.083 ms (every LRCLK at 48 kHz)
0 0 1 0 0 0 0 0 Updates every 0.67 ms (32 LRCLKs at 48 kHz)
102 Serial-Control Interface Register Definitions Copyright © 2012, Texas Instruments Incorporated
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