Datasheet

TAS5508C
www.ti.com SLES257–SEPTEMBER 2010
Each gain coefficient is in 28-bit (5.23) format so 0x80 0000 is a gain of 1. Each gain coefficient is written
as a 32-bit word with the upper four bits not used.
Table 7-19. Contents of One 20-Byte Biquad Filter Register (Default = All-Pass)
DEFAULT GAIN COEFFICIENT VALUES
DESCRIPTION REGISTER FIELD CONTENTS
DECIMAL HEX
b
0
coefficient u[31:28], b0[27:24], b0[23:16], b0[15:8], b0[7:0] 1.0 0x00, 0x80, 0x00, 0x00
b
1
coefficient u[31:28], b1[27:24], b1[23:16], b1[15:8], b1[7:0] 0.0 0x00, 0x00, 0x00, 0x00
b
2
coefficient u[31:28], b2[27:24], b2[23:16], b2[15:8], b2[7:0] 0.0 0x00, 0x00, 0x00, 0x00
a
1
coefficient u[31:28], a1[27:24], a1[23:16], a1[15:8], a1[7:0] 0.0 0x00, 0x00, 0x00, 0x00
a
2
coefficient u[31:28], a2[27:24], a2[23:16], a2[15:8], a2[7:0] 0.0 0x00, 0x00, 0x00, 0x00
7.19 Bass and Treble Bypass Register, Channels 1–8 (0x89–0x90)
Channels 1, 2, 3, 4, 5, 6, 7, and 8 are mapped into registers 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
and 0x90, respectively. Eight bytes are written for each channel. Each gain coefficient is in 28-bit (5.23)
format so 0x80 0000 is a gain of 1. Each gain coefficient is written as a 32-bit word with the upper four bits
not used.
Table 7-20. Channel 1–8 Bass and Treble Bypass Register Format
REGISTER TOTAL
CONTENTS INITIALIZATION VALUE
NAME BYTES
Channel bass and u[31:28], bypass[27:24], bypass[23:16], bypass[15:8], bypass[7:0] 0x00, 0x80, 0x00, 0x00
treble bypass
8
Channel bass and u[31:28], inline[27:24], inline[23:16], inline[15:8], inline[7:0] 0x00, 0x00, 0x00, 0x00
treble inline
7.20 Loudness Registers (0x91–0x95)
Table 7-21. Loudness Register Format
I
2
C SUB- TOTAL
REGISTER NAME DESCRIPTION OF CONTENTS DEFAULT STATE
ADDRESS BYTES
0x91 4 Loudness Log2 gain (LG) u[31:28], LG[27:24], LG[23:16], LG[15:8], LG[7:0] 0xFF, 0xC0, 0x00, 0x00
Loudness Log2 offset (LO) u[31:24], u[23:16], LO[15:8], LO[7:0] 0x00, 0x00, 0x00, 0x00
0x92 8
Loudness Log2 LO LO[31:24], LO[23:16], LO[15:8], LO[7:0] 0x00, 0x00, 0x00, 0x00
0x93 4 Loudness gain (G) u[31:28], G[27:24], G[23:16], G[15:8], G[7:0] 0x00, 0x00, 0x00, 0x00
Loudness offset upper u[31:24], u[23:16], O[15:8], O[7:0] 0x00, 0x00, 0x00, 0x00
16 bits (O)
0x94 8
Loudness O offset lower 32 O[31:24], O[23:16], O[15:8], O[7:0] 0x00, 0x00, 0x00, 0x00
bits (O)
Loudness biquad (b
0
) u[31:28], b0[27:24], b0[23:16], b0[15:8], b0[7:0] 0x00, 0x00, 0xD5, 0x13
Loudness biquad (b
1
) u[31:28], b1[27:24], b1[23:16], b1[15:8], b1[7:0] 0x00, 0x00, 0x00, 0x00
0x95 20 Loudness biquad (b
2
) u[31:28], b2[27:24], b2[23:16], b2[15:8], b2[7:0] 0x0F, 0xFF, 0x2A, 0xED
Loudness biquad (a
1
) u[31:28], a1[27:24], a1[23:16], a1[15:8], a1[7:0] 0x00, 0xFE, 0x50, 0x45
Loudness biquad (a
2
) u[31:28], a2[27:24], a2[23:16], a2[15:8], a2[7:0] 0x0F, 0x81, 0xAA, 0x27
Copyright © 2010, Texas Instruments Incorporated Serial-Control Interface Register Definitions 85
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