Datasheet

TAS5508C
www.ti.com SLES257–SEPTEMBER 2010
3 TAS5508C Controls and Status
The TAS5508C provides control and status information from both the I
2
C registers and device pins.
This section describes some of these controls and status functions. The I
2
C summary and detailed
register descriptions are contained in Section 6 and Section 7.
3.1 I
2
C Status Registers
The TAS5508C has two status registers that provide general device information. These are the general
status register 0 (0x01) and the error status register (0x02).
3.1.1 General Status Register (0x01)
• Device identification code
• Clip indicator – The TAS5508C has a clipping indicator. Writing to the register clears the indicator.
• Bank switching is busy.
3.1.2 Error Status Register (0x02)
• No internal errors (the valid signal is high)
• A clock error has occurred – These are sticky bits that are cleared by writing to the register.
– LRCLK error – when the number of MCLKs per LRCLK is incorrect
– SCLK error – when the number of SCLKS per LRCLK is incorrect
– Frame slip – when the number of MCLKs per LRCLK changes by more than 10 MCLK cycles
– PLL phase-lock error
• This error status register is normally used for system development only.
3.2 TAS5508C Pin Controls
The TAS5508C provide a number of terminal controls to manage the device operation. These controls
are:
• RESET
• PDN
• BKND_ERR
• HP_SEL
• MUTE
3.2.1 Reset (RESET)
The TAS5508C is placed in the reset mode either by the power-up reset circuitry when power is applied,
or by setting the RESET terminal low.
RESET is an asynchronous control signal that restores the TAS5508C to the hard mute state (M). Master
volume is immediately set to full attenuation (there is no ramp down). Reset initiates the device reset
without an MCLK input. As long as the RESET terminal is held low, the device is in the reset state. During
reset, all I
2
C and serial data bus operations are ignored.
Table 3-1 shows the device output signals while RESET is active.
Table 3-1. Device Outputs During Reset
SIGNAL SIGNAL STATE
Valid Low
PWM P-outputs Low (M-state)
PWM M-outputs Low (M-state)
Copyright © 2010, Texas Instruments Incorporated TAS5508C Controls and Status 43
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