Datasheet

Mid Z Sequence Compatibility
DEVICE PROTECTION SYSTEM
ERROR REPORTING
Use of TAS5352A in High-Modulation-Index
TAS5352A
SLES239 – NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com
Characteristics section of this data sheet). Although signal using the system microcontroller and
not specifically required, it is a good practice to hold responding to an overtemperature warning signal by,
RESET_AB and RESET_CD low during power down, e.g., turning down the volume to prevent further
thus preventing audible artifacts including pops or heating of the device resulting in device shutdown
clicks. (OTE).
When the TAS5352A is being used with TI PWM To reduce external component count, an internal
modulators such as the TAS5518, no special pullup resistor to 3.3 V is provided on both SD and
attention to the state of RESET_AB and RESET_CD OTW outputs. Level compliance for 5-V logic can be
is required, provided that the chipset is configured as obtained by adding external pullup resistors to 5 V
recommended. (see the Electrical Characteristics section of this data
sheet for further specifications).
The TAS5352A is compatible with the Mid Z
sequence of the TAS5086 Modulator. The Mid Z The TAS5352A contains advanced protection circuitry
Sequence is a series of pulses that is generated by carefully designed to facilitate system integration and
the modulator. This sequence causes the power ease of use, as well as to safeguard the device from
stage to slowly enable its outputs as it begins to permanent failure due to a wide range of fault
switch. conditions such as short circuits, overload,
overtemperature, and undervoltage. The TAS5352A
By slowly starting the PWM switching, the impulse
responds to a fault by immediately setting the power
response created by the onset of switching is
stage in a high-impedance (Hi-Z) state and asserting
reduced. This impulse response is the acoustic
the SD pin low. In situations other than overload and
artifact that is heard in the output transducers
over-temperature error ( OTE), the device
(loudspeakers) and is commonly termed " click " or
automatically recovers when the fault condition has
" pop " .
been removed, i.e., the supply voltage has increased.
The low acoustic artifact noise of the TAS5352A will
The device will function on errors, as shown in the
be further decreased when used in conjunction with
following table
the TAS5086 modulator with the Mid Z Sequence
BTL MODE PBTL MODE SE MODE
enabled.
Local Local Local
The Mid Z sequence is primarily used for the
Error Turns Off Error Turns Off Error Turns Off
single-ended output configuration. It facilitates a
In In In
" softer " PWM output start after the split cap output
A A A
A + B A + B
configuration is charged.
B B B
A + B + C
+ D
C C C
C + D C + D
D D D
The SD and OTW pins are both active-low,
open-drain outputs. Their function is for
Bootstrap UVP does not shutdown according to the
protection-mode signaling to a PWM controller or
table, it shuts down the respective halfbridge.
other system-control device.
Any fault resulting in device shutdown is signaled by
Capable Systems
the SD pin going low. Likewise, OTW goes low when
the device junction temperature exceeds 125 ° C (see
This device requires at least 30 ns of low time on the
the following table).
output per 384-kHz PWM frame rate in order to keep
the bootstrap capacitors charged. As an example, if
SD OTW DESCRIPTION
the modulation index is set to 99.2% in the TAS5508,
0 0 Overtemperature (OTE) or overload (OLP) or
this setting allows PWM pulse durations down to 10
undervoltage (UVP)
ns. This signal, which does not meet the 30-ns
0 1 Overload (OLP) or undervoltage (UVP)
requirement, is sent to the PWM_X pin and this
1 0 Junction temperature higher than 125 ° C
low-state pulse time does not allow the bootstrap
(overtemperature warning)
capacitor to stay charged. The TAS5352A device
1 1 Junction temperature lower than 125 ° C and no
requires limiting the TAS5508 modulation index to
OLP or UVP faults (normal operation)
97.7% to keep the bootstrap capacitor charged under
all signals and loads.
Note that asserting either RESET_AB or RESET_CD
low forces the SD signal high, independent of faults
The TAS5352A contains a bootstrap capacitor under
being present. TI recommends monitoring the OTW
voltage protection circuit (BST_UVP) that monitors
the voltage on the bootstrap capacitors. When the
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