Datasheet

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Mid Z Sequence Compatability
DEVICE PROTECTION SYSTEM
ERROR REPORTING
Use of TAS5352 in High-Modulation-Index
TAS5352
SLES204A SEPTEMBER 2007 REVISED OCTOBER 2007
Characteristics section of this data sheet). Although signal using the system microcontroller and
not specifically required, it is a good practice to hold responding to an overtemperature warning signal by,
RESET_AB and RESET_CD low during power down, e.g., turning down the volume to prevent further
thus preventing audible artifacts including pops or heating of the device resulting in device shutdown
clicks. (OTE).
When the TAS5352 is being used with TI PWM To reduce external component count, an internal
modulators such as the TAS5518, no special pullup resistor to 3.3 V is provided on both SD and
attention to the state of RESET_AB and RESET_CD OTW outputs. Level compliance for 5-V logic can be
is required, provided that the chipset is configured as obtained by adding external pullup resistors to 5 V
recommended. (see the Electrical Characteristics section of this data
sheet for further specifications).
The TAS5352 is compatable with the Mid Z sequence
of the TAS5086 Modulator. The Mid Z Sequence is a The TAS5352 contains advanced protection circuitry
series of pulses that is generated by the modulator. carefully designed to facilitate system integration and
This sequence causes the power stage to slowly ease of use, as well as to safeguard the device from
enable its outputs as it begins to switch. permanent failure due to a wide range of fault
conditions such as short circuits, overload,
By slowly starting the PWM switching, the impulse
overtemperature, and undervoltage. The TAS5352
response created by the onset of switching is
responds to a fault by immediately setting the power
reduced. This impulse response is the acoustic
stage in a high-impedance (Hi-Z) state and asserting
artifact that is heard in the output transducers
the SD pin low. In situations other than overload and
(loudspeakers) and is commonly termed "click" or
over-temperature error ( OTE), the device
"pop".
automatically recovers when the fault condition has
been removed, i.e., the supply voltage has increased.
The low acoustic artifact noise of the TAS5352 will be
further decreased when used in conjunction with the
The device will function on errors, as shown in the
TAS5086 modulator with the Mid Z Sequence
following table
enabled.
BTL MODE PBTL MODE SE MODE
The Mid Z sequence is primarily used for the
Local Local Local
single-ended output configuration. It facilitates a
Error Turns Off Error Turns Off Error Turns Off
"softer" PWM output start after the split cap output
In In In
configuration is charged.
A A A
A + B A + B
B B B
A + B + C
+ D
C C C
C + D C + D
The SD and OTW pins are both active-low,
D D D
open-drain outputs. Their function is for
protection-mode signaling to a PWM controller or
Bootstrap UVP does not shutdown according to the
other system-control device.
table, it shutsdown the respective halfbridge.
Any fault resulting in device shutdown is signaled by
the SD pin going low. Likewise, OTW goes low when
Capable Systems
the device junction temperature exceeds 125 ° C (see
the following table).
This device requires at least 30 ns of low time on the
output per 384-kHz PWM frame rate in order to keep
SD OTW DESCRIPTION
the bootstrap capacitors charged. As an example, if
0 0 Overtemperature (OTE) or overload (OLP) or
the modulation index is set to 99.2% in the TAS5508,
undervoltage (UVP)
this setting allows PWM pulse durations down to 10
0 1 Overload (OLP) or undervoltage (UVP)
ns. This signal, which does not meet the 30-ns
1 0 Junction temperature higher than 125 ° C
requirement, is sent to the PWM_X pin and this
(overtemperature warning)
low-state pulse time does not allow the bootstrap
1 1 Junction temperature lower than 125 ° C and no
capacitor to stay charged. The TAS5352 device
OLP or UVP faults (normal operation)
requires limiting the TAS5508 modulation index to
97.7% to keep the bootstrap capacitor charged under
Note that asserting either RESET_AB or RESET_CD
all signals and loads.
low forces the SD signal high, independent of faults
being present. TI recommends monitoring the OTW
The TAS5352 contains a bootstrap capacitor under
voltage protection circuit (BST_UVP) that monitors
the voltage on the bootstrap capacitors. When the
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