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3.1 Short-Circuit Protection and Fault-Reporting Circuitry
3.2 Fault Reporting
4 TAS5132DDV6EVM Performance
TAS5132DDV6EVM Performance
The TAS5132 is a self-protecting device that provides fault reporting (including high-temperature
protection and short-circuit protection). TAS5132 is configured in back-end auto-recovery mode and
therefore resets automatically after all errors (M1, M2, and M3 are set low); see the TAS5086 data sheet
for further explanation. This mean that the device restarts itself after an error occasion and reports shortly
through the SD error signal.
The OTW and SD outputs from TAS5132 indicate fault conditions. See the TAS5132 data sheet
(SLES190 ) for a description of these pins.
Table 3. TAS5132 Warning/Error Signal Decoding
OTW SD Device Condition
0 0 High-temperature error and/or high-current error
0 1 High-temperature warning
1 0 Undervoltage lockout or high-current error
1 1 Normal operation, no errors/warnings
The temperature warning signals at the TAS5132DDV6EVM board are wired-OR to one temperature
warning signal ( OTW– pin 22 in control interface connector). Shutdown signals are wired-OR into one
shutdown signal ( SD– pin 20 in control interface connector).
The shutdown signals together with the temperature warning signal give chip state information as
described in Table 3 . Device fault reporting outputs are open-drain outputs.
Table 4. General Test Conditions
General Test Conditions Notes
Output stage supply voltage: 18 V Laboratory power supply (EA-PS 7065-10A)
System supply voltage: 15 V
Load impedance SE: 4 Ω
Load impedance BTL: 8 Ω
Input signal 1-kHz sine
Sampling frequency 48 kHz
Gain setting in TAS5086 0 dB
Measurement filter AES17
TI input-USB board Input-USB Rev 10
EVM configuration file Version 2.00 TAS5132DDV6EVM configuration (2.00).cfg
Table 5. TAS5086 Register Settings
(1)
Register Register Value Notes
Oscillator trim register 0x1B 00 Initiate factory trim
Split-capacitor register 0x1A 1C Set split-capacitor charge period to 4160 ms
Master volume register 0x07 30 Master volume set to 0 dB
Modulation limit register 0x10 04 Modulation index set to 96.1%
0x18 Channel 1-4 set to start part 2
PWM start register 30
Channel 5-6 set to start part 1
(1)
These register settings are used for all test, unless otherwise specified.
SLLU096A – February 2007 – Revised March 2007 TAS5132DDV6EVM 7
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