Datasheet
www.ti.com
GENERAL INFOMATION
Terminal Assignment
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36
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GND
PWM_BP
GND
RESET
DREG_RTN
GVDD
M3
DREG
DGND
M1
M2
DVDD
SD
DGND
OTW
GND
PWM_AP
GND
GVDD_B
GVDD_B
GND
BST_B
PVDD_B
PVDD_B
OUT_B
OUT_B
GND
GND
OUT_A
OUT_A
PVDD_A
PVDD_A
BST_A
GND
GVDD_A
GVDD_A
DKD PACKAGE
(TOP VIEW)
ABSOLUTE MAXIMUM RATINGS
TAS5121I
SLES122 – SEPTEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
The TAS5121I is offered in a thermally enhanced 36-pin PSOP3 (DKD) package. The DKD package has the
thermal pad on top.
over operating free-air temperature range unless otherwise noted
(1)
DVDD TO DGND –0.3 V to 4.2 V
GVDD_x TO GND 14.2 V
PVDD_X TO GND (dc voltage) 33.5 V
PVDD_X TO GND
(2)
48 V
OUT_X TO GND (dc voltage) 33.5 V
OUT_X TO GND
(2)
48 V
BST_X TO GND (dc voltage) 46 V
BST_X TO GND
(2)
53 V
PWM_XP, RESET, M1, M2, M3, SD, OTW –0.3 V to DVDD + 0.3 V
T
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Maximum junction temperature range –40 ° C to 150 ° C
Storage temperature –40 ° C to 125 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The duration should be less than 100 ns (see application note SLEA025 ).
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