Datasheet

TAS5112A
SLES094B - OCTOBER 2003 - REVISED JUNE 2008
www.ti.com
17
Heatsink thermal resistance is generally predicted by the
heatsink vendor, modeled using a continuous flow
dynamics (CFD) model, or measured.
Thus, for a single monaural IC, the system R
θ
JA
= R
θ
JC
+
thermal grease resistance + heatsink resistance.
Table 4, Table 5, and Table 6 indicate modeled
parameters for one or two TAS5112A ICs on a single
heatsink. The final junction temperature is set at 110°C in
all cases. It is assumed that the thermal grease is 0.002
inch thick and that it is similar in performance to Wakefield
Type 126 thermal grease. It is important that the thermal
grease layer is ≤0.002 inches thick and that thermal pads
or tape are not used in the pad-to-heatsink interface due
to the high power density that results in these extreme
power cases.
Table 4. Case 1 (2 × 50 W Unclipped Into 6 Ω,
Both Channels in Same IC)
(1)
56-Pin HTSSOP
Ambient temperature 25°C
Power to load (per channel) 50 W (unclipped)
Power dissipation 4.5 W
Delta T inside package
10.2°C, note 2 ×
channel dissipation
Delta T through thermal grease
37.1°C, note 2 ×
channel dissipation
Required heatsink thermal resistance 4.2°C/W
Junction temperature 110°C
System R
θ
JA
19°C/W
R
θ
JA
* power dissipation 85°C
Junction temperature 85°C + 25°C = 110°C
(1)
This case represents a stereo system with only one package. See
Case 2 and Case 2A if doing a full-power, 2-channel test in a
multichannel system.
Table 5. Case 2 (2 × 50 W Unclipped Into 6 Ω,
Channels in Separate Packages)
(1)
56-Pin HTSSOP
Ambient temperature 25°C
Power to load (per channel) 50 W (unclipped)
Power dissipation 4.5 W
Delta T inside package 5.1°C
Delta T through thermal grease 18.6°C
Required heatsink thermal resistance 6.9°C/W
Junction temperature 110°C
System R
θ
JA
19°C/W
R
θ
JA
* power dissipation 85°C
Junction temperature 85°C + 25°C = 110°C
(1)
In this case, the power is separated into two packages. Note that
this allows a considerably smaller heatsink because twice as much
area is available for heat transfer through the thermal grease. For
this reason, separating the stereo channels into two ICs is
recommended in full-power stereo tests made on multichannel
systems.
Table 6. Case 2A (2 × 60 W Into 6 Ω, Channels in
Separate IC Packages)
(1)
56-Pin HTSSOP
Ambient temperature 25°C
Power to load (per channel) 60 W (10% THD)
Power dissipation per channel 5.4 W
Delta T inside package
6.1°C, note 2 ×
channel dissipation
Delta T through thermal grease
22.3°C, note 2 ×
channel dissipation
Required heatsink thermal resistance 5.3°C/W
Junction temperature 110°C
System R
θ
JA
15.9°C/W
R
θ
JA
* power dissipation 85°C
Junction temperature 85°C + 25°C = 110°C
(1)
In this case, the power is also separated into two packages, but
overdriving causes clipping to 10% THD. In this case, the high
power requires extreme care in attachment of the heatsink to
ensure that the thermal grease layer is ≤ 0.002 inches thick. Note
that this power level should not be attempted with both channels in
a single IC because of the high power density through the thermal
grease layer.