Datasheet
A6 A5 A0 R/W ACK A7 A6 A5 A4 A0 ACK A6 A5 A0 ACK
Start
Condition
Stop
Condition
Acknowledge Acknowledge Acknowledge
I CDevice Addressand
2
Read/WriteBit
Subaddress DataByte
D7 D6 D1 D0 ACK
I CDevice Addressand
Read/WriteBit
2
Not
Acknowledge
R/WA1 A1
RepeatStart
Condition
T0036-03
MULTIPLE-BYTE READ
A6 A0 ACK
Acknowledge
I CDevice Addressand
Read/WriteBit
2
R/WA6 A0 R/W ACK A0 ACK D7 D0 ACK
Start
Condition
Stop
Condition
Acknowledge Acknowledge Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I CDevice Addressand
Read/WriteBit
2
Subaddress OtherDataBytes
A7 A6 A5 D7 D0 ACK
Acknowledge
D7 D0
T0036-04
COMMAND CHARACTERISTICS
TAS5086
www.ti.com
................................................................................................................................................... SLES131C – FEBRUARY 2005 – REVISED JUNE 2008
memory address to be read. As a result, the read/write bit is set to a 0. After receiving the TAS5086 address and
the read/write bit, the TAS5086 responds with an acknowledge bit. In addition, after sending the internal memory
address byte or bytes, the master device transmits another start condition, followed by the TAS5086 address and
the read/write bit again. This time, the read/write bit is set to 1, indicating a read transfer. After receiving the
TAS5086 and the read/write bit, the TAS5086 again responds with an acknowledge bit. Next, the TAS5086
transmits the data byte from the memory address being read. After receiving the data byte, the master device
transmits a not-acknowledge, followed by a stop condition, to complete the single-byte data read transfer.
Figure 25. Single-Byte Read Transfer
A multiple-byte data read transfer is identical to a single-byte data read transfer, except that multiple data bytes
are transmitted by the TAS5086 to the master device as shown in Figure 26 . Except for the last data byte, the
master device responds with an acknowledge bit after receiving each data byte.
Figure 26. Multiple-Byte Read Transfer
The TAS5086 has two groups of I
2
C commands. One set is commands that are designed specifically to be
operated while audio is streaming and that have built-in mechanisms to prevent noise, clicks, and pops. The
other set does not have this built-in protection.
Commands that are designed to be adjusted while audio is streaming
• Master volume
• Master mute
• Individual channel volume
• Individual channel mute
Commands that the system executes without additional processing to prevent noise, clicks, or pops (in a
number of cases this does not produce an audible click and pop)
• Serial data interface format
• De-emphasis
• Sample rate conversion
• Input multiplexer
• Output multiplexer
• Biquads
• Downmix
Copyright © 2005 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): TAS5086