Datasheet

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2.2 Loudspeaker Connectors (J101 … J106)
1
2
(PCBconnectortopview)
2.3 Control Interface (J40)
Loudspeaker Connectors (J101 … J106)
Table 2-2. J901 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 PVDD Output-stage power supply
2 — System power supply
3 GND Ground
4 GND Ground
CAUTION
Both positive and negative speaker outputs are floating and may not be
connected to ground (e.g., through an oscilloscope).
Figure 2-3. J101 . . . J106 Pin Numbers
Table 2-3. J101 . . . J106 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 OUT-1 Speaker negative output
2 OUT-2 Speaker positive output
This interface connects the TAS5086-5186V6EVM board to a TI input-USB board.
Table 2-4. J40 Pin Description
PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION
1 GND Ground
2 RESERVED —
3 GND Ground
4 RESET System reset (bidirectional). Activate
MUTE before RESET for quiet reset.
5 BKND-ERR Backend error (or soft reset) provides
reduced click and pop reset, without
resetting I
2
C volume register settings.
6 MUTE Ramp volume from any setting to
noiseless soft mute. Mute can also be
activated by I
2
C.
7 PDN Power down. TAS5086 will go to
power-down state when activated.
8 RESERVED —
9 RESERVED —
10 SDA I
2
C data clock
11 GND Ground
12 SCL I
2
C bit clock
13 RESERVED —
8 System Interfaces SLEU073 – JULY 2006
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