Datasheet


SLAS328 − SEPTEMBER 2001
3
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functional block diagram
PLL/Clock
Generator
OSC
Serial
Audio
Port
Digital
Interpolation
Filter
Equibit
Modulator
Buffer
Audio Port
Configuration
Control Section
LRCLK
SCLK
SDIN
PWM_AP_L
PWM_AM_L
PLL_FLT_RET
PLL_FLT_OUT
MCLK_IN MCLK_OUT XTL_IN XTL_OUT OSC_CAP
MOD0 MOD1 MOD2
DEM_SEL
DEM_EN
MUTE
RESET
PDN
FTEST
STEST
DBSPD
M_S
DVDD1
DVSS1
DVDD2
DVSS2
DVDD3_L
DVSS3_L
DVDD3_R
DVSS3_R
AVDD1
AVSS1
AVDD2
AVSS2
PWM_AP_R
PWM_AM_R
VALID_R VALID_L
AVAILABLE OPTIONS
T
A
PACKAGE
†
0°C to 70°C TAS5010PFB
−40°C to 85°C TAS5010IPFB
†
These packages are available taped and reeled. Add an R suffix to
device type (e.g., TAS5010PFBR).