Datasheet

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SLAS328 − SEPTEMBER 2001
13
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TAS5010/TAS5100 system performance measured at the speaker terminals
See application note, literature number SLAA117.
switching characteristics,
T
A
= 25°C, DV
DD1
= DV
DD2
= DV
DD3_L
= DV
DD3_R
= AV
DD1
= AV
DD2
= 10% 3.3 V ±10%
serial audio ports slave mode
PARAMETER MIN TYP MAX UNIT
f
(SCLK)
SCLK frequency 12.288 MHz
t
su(SDIN)
SDIN setup time before SCLK rising edge 20 ns
t
h(SDIN)
SDIN hold time from SCLK rising edge 10 ns
F
(LRCLK)
LRCLK frequency 44.1 48 192 kHz
MCLK duty cycle 50%
SCLK duty cycle 50%
LRCLK duty cycle 50%
t
su(LRCLK)
LRCLK edge setup before SCLK rising edge 20 ns
serial audio ports master mode, load conditions: 50 pF
PARAMETER MIN TYP MAX UNIT
t
(MSD)
MCLK to SCLK 0 5 ns
t
(MLRD)
MLCK to LRCLK 0 5 ns
DSP serial interface mode
PARAMETER MIN TYP MAX UNIT
f(SCLK) SCLK frequency 12.288 MHz
t
W(FSHIGH)
Pulse duration, sync 1/(64×f
s
) ns
t
su(SDIN)
,
t
su(LRCLK)
SDIN and LRCLK setup time before SCLK falling edge 20 ns
t
h(SDIN)
,
t
h(LRCLK)
SDIN and LRCLK hold time from SCLK falling edge 10 ns
SCLK duty cycle 50%