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9ApplicationInformation
9.1Schematics
TAS3108,TAS3108IA
AUDIODIGITALSIGNALPROCESSORS
SLES152BOCTOBER2005REVISEDNOVEMBER2007
Figure9-1showsatypicalTAS3108/TAS3108IAapplication.Inthisapplication,thefollowingconditions
apply:
TAS3108/TAS3108IAisinclock-slavemode.Theaudio(SDIN1,SDIN2,SDIN3,SDIN4)andclock
source(MCLKI)areexternal.
MCLKI=12.288MHz
BecauseMCLKIissourcedexternally,theTAS3108/TAS3108IAcrystalinterfaceisnotused.MCLKI
andXTLIarelogicallyORedtogether,meaningthatwhentheMCLKIpinisused,theXTALIpinmust
begrounded.
I
2
Cregister0x00containsthedefaultsettingswhichmeans:
Audiodatawordsizeis24-bitinputand24-bitoutput.
Serialdataformatis2channel,I
2
Sforinputandoutput.
I
2
Cdatatransferisapproximately400kbpsforbothmasterandslaveI
2
Cinterfaces.
PLL0=PLL1=PLL2=0meansthatf
DSPCLK
is11×MCLKI=135.2MHzandthat
f
I2CSCL
=375kHz.
Samplefrequency(f
S
)is48kHz,whichrequiresthatf
LRCLK
=48kHzandf
SCLKIN
=3.072MHz.
ApplicationcodeanddataareloadedfromanexternalEEPROMusingthemasterI
2
Cinterface.
ApplicationcommandscomefromthesystemmicroprocessortotheTAS3108/TAS3108IAusingthe
slaveI
2
Cinterface.
Gooddesignpracticerequiresisolationbetweenthedigitalandanalogpowerasshown.Power-supply
capacitorsof10µFand0.1µFshouldbeplacednearthepower-supplypinsAVDD(AVSS)andDVDD
(DVSS).
TheTAS3108/TAS3108IAresetneedsexternalglitchprotection.Also,resetgoingHIGHshouldbe
delayeduntilTAS3108/TAS3108IAinternalpowerisgood(~200µs).Thisisprovidedbythe1-kresistor,
1-µFcapacitor,anddiodeplacedneartheRESETpin.
Itisrecommendedthata4.7-µFcapacitor(fastceramictype)beplacednearpin28(VR_DIG).Thispin
mustnotbeusedtosourceexternalcomponents.
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