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ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Custom audio Car stereo, Consumer audio I²C TSSOP 38
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5ClockControls
TAS3108,TAS3108IA
AUDIODIGITALSIGNALPROCESSORS
SLES152B–OCTOBER2005–REVISEDNOVEMBER2007
ClockmanagementfortheTAS3108/TAS3108IAconsistsoftwocontrolstructures:
•Masterclockmanagement
–Overseestheselectionoftheclockfrequenciesforthe8051microprocessor,theI
2
Ccontroller,and
theaudioDSPcore
–Themasterclock(MCLKIorXTALI)isthesourcefortheseclocks.
–Inmostapplications,themasterclockdrivesanon-chipdigitalphase-lockedloop(DPLL),andthe
DPLLoutputdrivesthemicroprocessorandaudioDSPclocks.
–AlsoavailableistheDPLLbypassmode,inwhichthehigh-speedmasterclockdirectlydrivesthe
microprocessorandaudioDSPclocks.
•Serialaudioport(SAP)clockmanagement
–OverseesSAPmaster/slavemode
–ControlsoutputofSCLKOUT1,SCLKOUT2,andLRCLKintheSAPmastermode
Figure5-2showstheclockcircuitryintheTAS3108/TAS3108IA.InputpinMCLKIorXTALIprovidesthe
masterclockfortheTAS3108/TAS3108IA.WithintheTAS3108/TAS3108IA,thesetwoinputsare
combinedbyanORgateand,thus,onlyoneofthesetwosourcescanbeactiveatanyonetime.The
sourcethatisnotactivemustbelogic0.
Innormaloperation,1,2,or4(asdeterminedbythelogiclevelssetatinputpinsPLL0andPLL1)divides
themasterclock.TheDPLLthenmultipliesthissignalby11infrequency(PLL2=LOW).Themultiplier
ratioisalways11(pinPLL2=LOW).TheDPLLoutputistheprocessingclockusedbytheaudioDSP
core.
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