Datasheet

3−27
Delay
Channel 1
Delay
Channel 2
Delay Channel 3 (P
CH3
= 0)
Reserved
Reverb
Channel 1
Reserved
Reverb
Channel 2 (P
R2
= 0)
Reverb
Channel 3
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ P
R3
+ 3)
Start
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ P
R3
+ 4) − 1
Stop
0
Start
2(P
CH1
+ 1) − 1
Stop
Delay Memory Allocation − CH1
(CH 1 Delay Assignment = P
CH1
)
2(P
CH1
+ 1)
Start
2(P
CH1
+ P
CH2
+ 2) − 1
Stop
Delay Memory Allocation − CH2
(CH 2 Delay Assignment = P
CH2
)
2(P
CH1
+ P
CH2
+ 2)
Start
2(P
CH1
+ P
CH2
+ 2) + 1
Stop
Delay Memory Allocation − CH3
(CH 3 Delay Assignment = P
CH3
= 0)
2(P
CH1
+ P
CH2
+ 3)
Start
2(P
CH1
+ P
CH2
+ 3) + 1
Stop
Delay Memory Allocation − Reserved
(Reserved Delay Assignment = 0)
2(P
CH1
+ P
CH2
+ 4)
Start
Stop
Reverb Delay Memory Allocation − CH1
(CH 1 Reverb Delay Assignment = P
R1
)
Start
Stop
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ 1) − 1
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ 1)
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ 1) + 2
Reverb Delay Memory Allocation − CH2
(CH 2 Reverb Delay Assignment = P
R2
= 0)
Reverb Delay Memory Allocation − Reserved
(Reserved Reverb Delay Assignment = 0)
Start
Stop
Reverb Delay Memory Allocation − CH3
(CH 3 Reverb Delay Assignment = P
R3
)
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ P
R3
+ 3) − 1
2(P
CH1
+ P
CH2
+ 4) + 3(P
R1
+ 2)
Figure 3−17. Delay Line Memory Implementation