Datasheet

2−21
Table 2−4. I
2
C EEPROM Data
(1)(2)
DATA TYPE
EEPROM BYTE
ADDRESSES
SUBADDRESS(ES)
Starting I
2
C check word—must match ending check word 0x000−0x003 0x00
Input mixers—set 1 0x004−0x0CF 0x01−0x33
Effects block biquads 0x0D0−0x2AF 0x34−0x4B
Reverberation (reverb) block mixers 0x2B0−0x2C7 0x4C−0x4E
CH1 biquads 0x2C8−0x3B7 0x4F−0x5A
CH2 biquads 0x3B8−0x4A7 0x5B−0x66
CH3 biquads 0x4A8−0x597 0x67−0x72
Bass and treble inline/bypass mixers 0x590−0x5AF 0x73−0x75
DRC mixers 0x5B0−0x5DF 0x76−0x7E
Dither input mixers 0x5E0−0x5EB 0x7F−0x81
Valid data
CH3 (subwoofer) to CH1/CH2 (L/R) mixers 0x5EC−0x5F3 0x82−0x83
Valid data
Spectrum analyzer/VU meter mixers 0x5F4−0x60B 0x84−0x89
Output mixers 0x60C−0x66B 0x8A−0xA1
CH1 loudness parameters 0x66C−0x697 0xA2−0xA6
CH2 loudness parameters 0x698−0x6C3 0xA7−0xAB
CH3 loudness parameters 0x6C4−0x6EF 0xAC−0xB0
CH1/CH2 DRC parameters 0x6F0−0x733 0xB1−0xB5
CH3 DRC parameters 0x734−0x777 0xB6−0xBA
Spectrum analyzer parameters 0x778−0x847 0xBB−0xC5
Dither output mixers 0x848−0x84F 0xC6
Dither speed 0x850−0x853 0xC7
Factory Test Data (EEPROM Spacer Data) − Zeros 0x854−0x85F 0xC8−0xC9
Valid data Input mixers—set 2 0x860−0x87F 0xCA−0xD1
Spacer Data 0x880−0x8E3 0xD2−0xEA
Valid data Watchdog timer enable—must be disabled = 00 00 00 01 0x8E4−0x8E7 0xEB
Factory Test Data (EEPROM Spacer Data) − Zeros 0x8E8−0x8EF 0xEC−0xED
(3)
GPIO port parameters 0x8F0−0x8F7 0xEE−0xEF
Volume parameters 0x8F8−0x90B 0xF0−0xF4
Bass/treble filter selections 0x90C−0x91R 0xF5−0xF8
Valid data
I
2
S command word 0x91C−0x91F 0xF9
Valid data
Delay/reverb settings 0x920−0x92B 0xFA
I
2
C M and N 0x92C−0x92F 0xFB
Ending I
2
C check word—must match starting check word 0x930−0x933 0xFC
Read Only Data (EEPROM Spacer Data) 0x934−0x941 0xFD−0xFF
NOTES: 1. EEPROM organization must be big-endian—MS byte of data word allocated to the lowest address in memory.
2. EEPROM device ID = A0.
3. For subaddresses 0xEC and 0xED, the EEPROM byte space does not coincide.
The I
2
C master mode also uses the starting and ending I
2
C check words to verify a proper EEPROM download. The
first 32-bit data word received from the EEPROM, the starting I
2
C check word at subaddress 0x00, is stored and
compared against the 32-bit data word received for subaddress 0xFC, the ending I
2
C check word. These two data
words must be equal as stored in the EEPROM. If the two words do not match when compared in the TAS3103A,
the TAS3103A conducts another parameter download from the EEPROM. If the comparison check again fails, the
TAS3103A discards all downloaded parameters and sets all parameters to the default values listed in the subaddress
table presented in Appendix A. In the I
2
C slave mode, these default values are used to initialize the TAS3103A at
power turnon or after a reset.