Datasheet

4−3
4.4 TAS3103A Timing Characteristics
4.4.1 Master Clock Signals Over Recommended Operating Conditions (Unless Otherwise
Noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
f
(XTALI)
Frequency, XTALI (1/t
c(1)
) 2.8 20 MHz
f
(MCLKI)
Frequency, MCLKI (1/t
c(2)
) 2.8 25 MHz
t
w(MCLKI)
Pulse duration, MCLKI high, see Note 1 H
MCLKI
− 25 H
MCLKI
H
MCLKI
+ 25 ns
MCLKI jitter ±5 ns
f
(MCLKO)
Frequency, MCLKO (1/t
c(3)
) 2.8 25 MHz
t
r(MCLKO)
Rise time, MCLKO C
L
= 30 pF 9.5 ns
t
f(MCLKO)
Fall time, MCLKO C
L
= 30 pF 9.5 ns
t
w(MCLKO)
Pulse duration, MCLKO high, see Note 4 H
MCLKO
ns
MCLKI jitter
XTALI master clock source 80 ps
MCLKI jitter
MTALI master clock source, see Note 5
t
d(MI−MO)
Delay time, MCLKI
rising edge to
MCKLO = MCLKI See Note 2 17 ns
t
d(MI−MO)
rising edge to
MCLKO rising edge
MCLKO < MCLKI See Note 2 and Note 3 17 ns
NOTES: 1. H
MCLKI
= 1 / 2MCLKI
2. Only applies when MCLKI is selected as master source clock.
3. Also applies to MCLKO falling edge when MCLKO = MCLKI/2 or MCLKI/4
4. H
MCLKO
= 1 / 2MCLKO. MCLKO has the same duty cycle as MCLKI when MCLKO = MCLKI. When MCLKO = 0.5 MCLKI or 0.25
MCLKI, the duty cycle of MCLKO is typically 50%.
5. When MCLKO is derived from MCLKI, MCLKO jitter = MCLKI jitter
XTALI
MCLKO
MCLKI
t
w(MCLKI)
t
f(MCLKO)
t
c(1)
t
c(2)
t
c(3)
t
w(MCLKO)
t
r(MCLKO)
t
d(MI-MO)
Figure 4−1. Master Clock Signals Timing Waveforms