Datasheet

4−2
4.3 Electrical Characteristics Over Recommended Operating Conditions (Unless
Otherwise Noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
V
OH
High-level output
3.3-V LVCMOS I
OH
= −4 mA 0.8 VDDS
V
V
OH
High-level output
voltage
1.8-V LVCMOS (XTALO)
I
OH
= −0.55 mA 0.8 AVDD
V
V
OL
Low-level output voltage
3.3-V LVCMOS I
OL
= 4 mA
0.22
VDDS
V
V
OL
Low-level output voltage
1.8-V LVCMOS (XTALO) I
OL
= 0.75 mA 0.22 AVDD
V
I
OZ
High-impedance output
current
3.3-V LVCMOS ±20 µA
I
IL
Low-level input
(1)
3.3-V LVCMOS V
I
= V
IL
±20
A
I
IL
Low-level input
current
(1)
1.8-V LVCMOS (XTALI)
V
I
= V
IL
±20
µA
I
IH
High-level input
(2)
3.3-V LVCMOS V
I
= V
IH
±20
A
I
IH
High-level input
current
(2)
1.8-V LVCMOS (XTALI)
V
I
= V
IH
±20
µA
DSP clock = 135 MHz,
LRCLK = 96 kHz,
MCLKI/XTALI = 12.228 MHz
75
DSP clock = 67.5 MHz,
LRCLK = 48 kHz,
MCLKI/XTALI = 12.228 MHz
44
I
DVDD
Digital supply current
DSP clock = 33.75 MHz,
LRCLK = 24 kHz,
MCLKI/XTALI = 12.228 MHz
25
mA
I
DVDD
Digital supply current
LRCLK = 48 kHz,
MCLKI/XTALI = 12.288 MHz,
Power down enabled
3.5
mA
No LRCLK, SCLK.
MCLKI/XTALI = 12.288 MHz,
Power down enabled
2.2
No LRCLK, SCLK, or
MCLKI/XTALI,
Power down enabled
2
DSP clock = 135 MHz,
LRCLK = 96 kHz,
MCLKI/XTALI = 12.228 MHz
2.9
DSP clock = 67.5 MHz,
LRCLK = 48 kHz,
MCLKI/XTALI = 12.228 MHz
2.7
I
A_DVDD
Analog supply current
DSP clock = 33.75 MHz,
LRCLK = 24 kHz,
MCLKI/XTALI = 12.228 MHz
2.4
mA
LRCLK = 48 kHz,
MCLKI/XTALI = 12.288 MHz,
Power down enabled
1.5
No LRCLK, SCLK, or
MCLKI/XTALI,
Power down enabled
1.5
NOTES: 1. Value given is for those input pins that connect to an internal pullup resistor as well as an input buffer. For inputs that have a pulldown
resistor or no resistor, I
IL
is ±1 µA.
2. Value given is for those input pins that connect to an internal pulldown resistor as well as an input buffer. For inputs that have a pullup
resistor or no resistor, I
IH
is ±1 µA.