Datasheet

DIN
BCLK
WCLK
MCLK
SPKVSS
AVSS
SCL/SSZ
SDA/MOSI
GPIO/DOUT
DVSS
AINL
AINR
SPKP
SPKM
HPOUT
RST
MISO
SPI_SEL
SCLK
6
6
SPKVDD
AVDD
LDO_SEL
DAC Signal
Proc.
Data
Interface
SPI/I
2
C
Control Block
PLL
Interrupt
Control
Primary I
2
S
Interface
Pin Muxing / Clock Routing
LDO
POR
Supplies
Mono 6
'DAC
DVDD
IOVDD
Secondary I
2
S
Interface
Dig
Vol
6 dB to +24 dB
(6 dB steps)
-6 dB to +29 dB
and Mute
(1 dB steps)
0 dB to -78 dB
and Mute
(Min 0.5 dB steps)
0 dB to -78 dB
and Mute
(Min 0.5 dB steps)
0 dB to -78 dB and Mute
(Min 0.5 dB steps)
TAS2505
SLAS778A FEBRUARY 2013REVISED FEBRUARY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Figure 1-1. Simplified Block Diagram
NOTE
This data manual is designed using PDF document-viewing features that allow quick access
to information. For example, performing a global search on "page 0 / register 27" produces
all references to this page and register in a list. This makes is easy to traverse the list and
find all information related to a page and register. Note that the search string must be of the
indicated format. Also, this document includes document hyperlinks to allow the user to find
a document reference. To come back to the original page, click the green left arrow near the
PDF page number at the bottom of the file. The hot-key for this function is alt-left arrow on
the keyboard. Another way to find information is to use the PDF bookmarks.
2 PACKAGE AND SIGNAL DESCRIPTIONS
2.1 Package/Ordering Information
OPERATING TRANSPORT MEDIA,
PACKAGE
PRODUCT PACKAGE TEMPERATURE ORDERING NUMBER QUANTITY
DESIGNATOR
RANGE
TAS2505IRGET Tape and reel, 250
TAS2505 QFN-24 RGE –40°C to 85°C
TAS2505IRGER Tape and reel, 3000
2 PACKAGE AND SIGNAL DESCRIPTIONS Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TAS2505