Datasheet

SRC4392
SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012 www.ti.com
Register 1D: General-Purpose Output 3 (GPO3) Control Register
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
0 0 0 0 GPO33 GPO32 GPO31 GPO30
GPO[33:30] General-Purpose Output 3 (GPO3) Configuration
These bits are used to set the state or data source for the general-purpose digital output pin
GPO3.
GPO33 GPO32 GPO31 GPO30 GPO3 Function
0 0 0 0 GPO3 is Forced Low (Default)
0 0 0 1 GPO3 is Forced High
0 0 1 0 SRC Interrupt, Active Low
0 0 1 1 Transmitter Interrupt, Active Low
0 1 0 0 Receiver Interrupt, Active Low
0 1 0 1 Receiver 50/15μs Pre-Emphasis, Active
Low
0 1 1 0 Receiver Non-Audio Data, Active High
0 1 1 1 Receiver Non-Valid Data, Active High
1 0 0 0 Receiver Channel Status Bit
1 0 0 1 Receiver User Data Bit
1 0 1 0 Receiver Block Start Clock
Receiver COPY Bit
1 0 1 1 (0 = Copyright Asserted, 1 = Copyright
Not Asserted)
Receiver L-Bit
1 1 0 0 (0 = First Generation or Higher, 1 =
Original)
1 1 0 1 Receiver Parity Error, Active High
1 1 1 0 Receiver Internal Sync Clock
1 1 1 1 Transmitter Internal Sync Clock
74 Submit Documentation Feedback Copyright © 2005–2012, Texas Instruments Incorporated
Product Folder Links: SRC4392