Datasheet

SRC4392
www.ti.com SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012
Register 0C: SRC and DIT Interrupt Mode Register
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
RATIOM1 RATIOM0 READYM1 READYM0 TSLIPM1 TSLIPM0 TBTIM1 TBTIM0
TBTIM[1:0] Transmitter Buffer Transfer Interrupt Mode
These bits are utilized to select the active trigger state for the BTI interrupt.
TBTIM1 TBTIM0 Interrupt Active State
0 0 Rising Edge Active (Default)
0 1 Falling Edge Active
1 0 Level Active
1 1 Reserved
TSLIPM[1:0] Transmitter Data Source Slip Interrupt Mode
These bits are utilized to select the active trigger state for the TSLIP interrupt.
TSLIPM1 TSLIPM0 Interrupt Active State
0 0 Rising Edge Active (Default)
0 1 Falling Edge Active
1 0 Level Active
1 1 Reserved
READYM SRC Ready Interrupt Mode
[1:0]
These bits are utilized to select the active trigger state for the READY interrupt.
READYM1 READYM0 Interrupt Active State
0 0 Rising Edge Active (Default)
0 1 Falling Edge Active
1 0 Level Active
1 1 Reserved
RATIOM SRC Ratio Interrupt Mode
[1:0]
These bits are utilized to select the active trigger state for the RATIO interrupt.
RATIOM1 RATIOM0 Interrupt Active State
0 0 Rising Edge Active (Default)
0 1 Falling Edge Active
1 0 Level Active
1 1 Reserved
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