Datasheet

SRC4392

www.ti.com

SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012

AESOFF AESOUT Output Enable

This bit is used to enable or disable the AESOUT (pin 34) buffered AES3-encoded CMOS logic

level output.

AESOFF AESOUT Output

0 Enabled; the AESOUT pin functions normally. (Default)

1 Disabled; the AESOUT pin is forced low.

TXBTD Transmitter C and U Data Buffer Transfer Disable

This bit is used to enable and disable buffer transfers between the DIT User Access (UA) and

DIT Transmitter Access (TA) buffers for both channel status (C) and user (U) data.

Buffer transfers may be disabled, allowing the user to write new C and U data to the UA buffers

via the SPI or I

C serial host interface. Once updated, UA-to-TA buffer transfers may then be re-

enabled, allowing the TA buffer to be updated and the new C and U data to be transmitted at the

start of the next block.

TXBTD User Access (UA) to Transmitter Access (TA) Buffer Transfers

0 Enabled (Default)

1 Disabled; allows the user to update DIT C and U data buffers.

Note: The TXCUS0 and TXCUS1 bits in control register 0x09 must be set to a non-zero value in

order for DIT UA buffer updates to occur.

LDMUX Transmitter Line Driver Input Source Selection

This bit is used to select the input source for the DIT differential line driver outputs.

LDMUX Line Driver Input Source

0 DIT AES3 Encoder Output (Default)

1 Bypass Multiplexer Output

AESMUX AESOUT CMOS Buffer Input Source Selection

This bit is used to select the input source for the AESOUT CMOS logic level output.

AESMUX AESOUT Buffer Input Source

0 DIT AES3 Encoder Output (Default)

1 Bypass Multiplexer Output

BYPMUX Bypass Multiplexer Source Selection

[1:0]

These bits select the line receiver output to be utilized as the Bypass multiplexer data source.

BYPMUX1 BYPMUX0 Line Receiver Output Selection

0 0 RX1 (Default)

0 1 RX2

1 0 RX3

1 1 RX4

Product Folder Links: SRC4392