Datasheet

SRC4392
www.ti.com SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012
PDSRC Power-Down for the SRC Function Block
Disabled; all function blocks will operate normally based upon
1
the applicable control register settings.
RESET Software Reset
This bit is used to force a reset initialization sequence, and is equivalent to forcing an external
reset via the RST input (pin 24).
RESET Reset Function
0 Disabled (Default)
1 Enabled; all control registers will be reset to the default state.
Register 02: Global Interrupt Status (Read-Only)
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
0 0 0 0 0 TX RX SRC
SRC SRC Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the SRC function block. This bit is active
high. The user should then read status register 0x0A in order to determine which of the sources
has generated an interrupt.
RX Receiver Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the DIR function block. This bit is active
high. The user should then read status registers 0x14 and 0x15 in order to determine which of
the sources has generated an interrupt.
TX Transmitter Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the DIT function block. This bit is active
high. The user should then read status register 0x0A in order to determine which of the sources
has generated an interrupt.
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