Datasheet

S A A A P
S A A A A A P
Byte1
SlaveAddress
withR/W=0
Byte2
RegisterAddressByte
withINC=0
Byte3
Reg sti er
Daat
Byte1
SlaveAddress
withR/W=0
Byte2
RegisterAddressByte
withINC=1
Byte3
RegisterData
Byte4
RegisterData
Fo Addr ress+1
ByteN
Register Data
ForAddress+N
(a)WritingaSingleRegister
(b) rW iting ult istersUsing uto-Incr m ntOperationM ip A eleSe uentialR gq e e
S=STAR oT n iCo d ti n
A=Acknowl d ee g
P=STOPCondii nt o
Transferfrom steMa r to Slave
TransferfromSlaveto Master
Legend
A6 A5 A4 A3 A2 A1 A0
1 1 1 0 0 A1 A0 R/W
Se yt b Pin 91
Se yt b Pin 12
MSB
LSB
Fir ts Byte After o itthe RSTA T/RESTART C ond i n
Slave Address
A6 A5 A4 A3 A2 A1 A0INC
MSB LSB
(a)SRC439 lave2 S Address
(b)Regist rAddree ssByte
Auto-In ecrem nt
0=Disabled
1=Enabled
SRC4392
SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012 www.ti.com
Figure 76. SRC4392 Slave Address and Register Address Byte Definitions
Figure 77. Fast/Standard Mode Write Operations
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