Datasheet

SRC4392

www.ti.com

SBFS029D –DECEMBER 2005–REVISED DECEMBER 2012

PIN DESCRIPTIONS (continued)

PIN NO.

NAME PFB RKP I/O DESCRIPTION

LRCKA 38 32 I/O Audio serial Port A Left/Right clock

LRCKB 47 40 I/O Audio serial Port B left/right clock

MCLK 25 21 Input Master clock

MUTE 14 — Input SRC output mute (active high)

NC 41 — — No internal signal connection, internally bonded to ESD pad

RDY 15 — Output SRC ready flag (active low)

RST 24 20 Input Reset (active low)

RX1+ 1 2 Input Line receiver 1, noninverting input

RX1– 2 3 Input Line receiver 1, inverting input

RX2+ 3 4 Input Line receiver 2, noninverting input

RX2– 4 5 Input Line receiver 2, inverting input

RX3+ 5 6 Input Line receiver 3, noninverting input

RX3– 6 — Input Line receiver 3, inverting input

RX4+ 7 — Input Line receiver 4, noninverting input

RX4– 8 — Input Line receiver 4, inverting input

RXCKI 13 11 Input DIR reference clock

RXCKO 12 10 Output DIR recovered master clock (3-state output)

SDINA 39 33 Input Audio serial Port A data input

SDINB 46 39 Input Audio serial Port B data input

SDOUTA 40 34 Output Audio serial Port A data output

SDOUTB 45 38 Output Audio serial Port B data output

SYNC 36 30 Output DIT internal sync clock

TX+ 32 26 Output DIT line driver noninverting output

TX– 31 25 Output DIT line driver inverting output

VDD33 33 27 Power DIR line receiver bias and DIT line driver supply, +3.3V nominal

VIO 42 35 Power Logic I/O supply, +1.65V to +3.6V

VDD18 17 13 Power Digital core supply, +1.8V nominal

VCC 9 7 Power DIR comparator and PLL power supply, +3.3V nominal

Product Folder Links: SRC4392