Datasheet

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SRC4382
SBFS030C – JANUARY 2006 – REVISED SEPTEMBER 2007
Register 02: Global Interrupt Status (Read-Only)
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
0 0 0 0 0 TX RX SRC
SRC SRC Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the SRC function block. This bit is active high. The user should then read status
register 0x0A in order to determine which of the sources has generated an interrupt.
RX Receiver Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the DIR function block. This bit is active high. The user should then read status
registers 0x14 and 0x15 in order to determine which of the sources has generated an interrupt.
TX Transmitter Function Block Interrupt Status (Active High)
When set to 1, this bit indicates an active interrupt from the DIT function block. This bit is active high. The user should then read status
register 0x0A in order to determine which of the sources has generated an interrupt.
Register 03: Port A Control Register 1
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
0 AMUTE AOUTS1 AOUTS0 AM/S AFMT2 AFMT1 AFMT0
AFMT[2:0] Port A Audio Data Format
These bits are used to set the audio input and output data format for Port A. Refer to the Audio Serial Port Operation section for
illustrations of the supported data formats. Refer to the Electrical Characteristics: Audio Serial Ports table and Figure 1 for an applicable
timing diagram and parameters.
AFMT2 AFMT1 AFMT0 Audio Data Format
0 0 0 24-Bit Left-Justified (Default)
0 1
0
24-Bit Philips I
2
S
0 1 0 Unused
0 1 1 Unused
1 0 0 16-Bit Right-Justified
1 0 1 18-Bit Right-Justified
1 1 0 20-Bit Right-Justified
1 1 1 24-Bit Right-Justified
Note: When the SRC is selected as the output data source for Port A and the data format for the port is set to Right-Justified, the proper
word length must be selected in the Port A control registers such that it matches the corresponding SRC output data word length. Refer to
control register 0x2F for the SRC output word length selection.
AM/S Port A Slave/Master Mode
This bit is used to set the audio clock mode for Port A to either Slave or Master.
AM/S Slave/Master Mode
0 Slave mode; the LRCK and BCK clocks are inputs generated by an external digital audio source. (Default)
1 Master mode; the LRCK and BCK clocks are outputs, derived from the Port A master clock source.
AOUTS[1:0] Port A Output Data Source
These bits are used to select the output data source for Port A. The data is output at SDOUTA (pin 40).
AOUTS1 AOUTS0 Output Data Source
0 0 Port A Input, for data loop back. (Default)
0 1 Port B Input
1 0 DIR
1 1 SRC
AMUTE Port A Output Mute
This bit is used to mute the Port A audio data output.
AMUTE Output Mute
0 Disabled; SDOUTA is driven by the output data source. (Default)
1 Enabled; SDOUTA is forced low.
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