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NOTE:SeeFigure82forpower-supplyconnections.Da ptionalconnectionstothehost.shedlinesdenoteo
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BCKA
LRCKA
SDINA
SDOUTA
NC
VIO
DGND3
BGND
SDOUTB
SDINB
LRCKB
BCKB
RX1+
RX1-
RX2+
RX2-
RX3+
RX3-
RX4+
RX4-
VCC
AGND
LOCK
RXCKO
SYNC
BLS
AESOUT
VDD33
TX+
TX-
DGND2
GPO4
GPO3
GPO2
GPO1
MCLK
RST
INT
CDOUT
CDIN
CCLK
CS
CPM
VDD18
DGND1
RDY
MUTE
RXCKI
SRC4382IPFB
FromDigita Inpul ts
(Line, Optical,Logic)
ToDigitalOutputs
(L ne,i O ca Lpti l, ogic)
ToHost o Exter alr n Logic
ToHost or xternalE Logic
SPI
Host
Controller
Audio
I/O
Device
Audio
I/O
Device
DIR
RefClock
Master
Clock
DIRRecoveredClock
VIO
10kW
NOTE:SeeFigure82forpower-supplyconnections.Da ptionalconnect on o ehost.shedlinesdenoteo i ts t h
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BCKA
LR KAC
SDI AN
SDOUTA
NC
VIO
DGND3
BGND
SDOUTB
SDI BN
LR KBC
BCKB
RX +1
RX -1
RX +2
RX -2
RX +3
RX -3
RX +4
RX -4
VCC
AGND
LOCK
RX KOC
SYNC
BLS
AESO TU
VDD 33
TX+
TX-
DGND2
GP 4O
GP 3O
GP 2O
GP 1O
MCLK
RST
INT
SDA
A1
SCL
A0
CPM
VDD 81
DGND1
RDY
MUTE
RX KIC
SRC4382IPFB
FromDigitalInputs
(Line, Optica ,Logl ic)
To Digital Outputs
(Line, Optical,Logic)
ToHost orExte nalr Logic
ToHost orExte nalr Logic
I C
2
Ho ts
Controller
Audio
I/O
Device
Audio
I/O
Device
DIR
RefClock
Master
Clock
DIRRecoveredClock
VIO
10kW
2.7kW
Tie
LOorHI
SRC4382
SBFS030C – JANUARY 2006 – REVISED SEPTEMBER 2007
Figure 80. Typical Application Diagram Using SPI Host Interface
Figure 81. Typical Application Diagram Using I
2
C Host Interface
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