Datasheet
Audio Output Ports
3-9
The DIT4192 transmitters (U7 and U17) have additional configuration
switches, summarized in Table 3−4 and Table 3−5. For the clock divider, the
corresponding control pins need to be set dependent upon the incoming mas-
ter clock (MCLK) and output sampling rates, f
Sout
. The master clock (MCLK)
rate is set by either reference clock RCKIA or RCKIB, or by the corresponding
DIT CLOCK input at connector J4 or J9 (dependent upon the clock configura-
tion; see Figure 3−3 and Figure 3−4).
Stereo mode operation is the default for most test cases. The Mono mode con-
figuration is utilized primarily to support testing at 176.4kHz and 192kHz output
sampling rates using an Audio Precision System Two Cascade or Cascade
Plus test system with Dual Channel mode support.
The buffered output serial ports OUTPUT PORT A (J2) and OUTPUT PORT
B (J7) support Left-Justified, Right-Justified, I
2
S, and time division multiplexed
(TDM) formatted audio data with word lengths up to 24 bits and sampling rates
up to 212kHz. The output ports may be operated in either Slave or Master
mode, but must match the output port setup for the SRC4194 device as de-
fined in Table 3−3. The buffered serial output ports provide a convenient meth-
od for interfacing to audio devices which support an audio serial data interface,
including external digital audio transmitters, audio data converters, and signal
processing components.
Table 3−4.Transmitter Clock Divider Configuration
If MCLK Rate Equal To: Set Transmitter Clock Divider Switches To:
128 × f
sOUT
x_CLK0 = LO, x_CLK1 = LO
256 × f
sOUT
x_CLK0 = HI, x_CLK1 = LO
384 × f
sOUT
x_CLK0 = LO, x_CLK1 = HI
512 × f
sOUT
x_CLK0 = HI, x_CLK1 = HI
Where f
sOUT
= the output sampling rate Where x = A (switch SW6) or B (switch SW8)
Table 3−5.Transmitter Stereo/Mono Mode Configuration
Transmitter Output Mode Set Mode Switches To:
Stereo x_MONO = LO, x_MDAT = LO
Mono with Left Channel Data Source x_MONO = HI, x_MDAT = LO
Mono with Right Channel Data Source x_MONO = HI, x_MDAT = HI
Where x = A (switch SW6) or B (switch SW8)