User’s Guide July 2004 SBAU096
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the absolute operating conditions shown in Table 2−1. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Contents Preface About This Manual This document contains the information required to setup and operate the SRC4194EVM evaluation module. For a more detailed description of the SRC4194, please refer to the product datasheet available from the Texas Instruments web site at http://www.ti.com. Additional support documents are listed in the sections of this guide entitled Related Documentation from Texas Instruments and Additional Documentation.
Contents Information About Cautions This document contains cautions. The information in a caution is provided for your protection. Please read each caution carefully. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment.
Contents Related Documentation From Texas Instruments The following documents provide information regarding Texas Instrument integrated circuits used in the assembly of the SRC4194EVM. These documents are available from the TI web site at http://www.ti.com. The last character of the literature number corresponds to the document revision, which is current at the time of the writing of this User’s Guide.
Contents If You Need Assistance If you have questions regarding either the use of this evaluation module or the information contained in the accompanying documentation, please contact the Texas Instruments Product Information Center at (972) 644−5580 or visit the TI Semiconductor Online Technical Support pages at http://www.ti.com. FCC Warning This equipment is intended for use in a laboratory test environment only.
Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 SRC4194 Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 SRC4194 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 SRC4194EVM Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents 1−1. 1−2. 3−1. 3−2. 3−3. 3−4. 4−1. 4−2. 4−3. 4−4. 4−5. 4−6. 4−7. 4−8. SRC4194 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 SRC4194EVM Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 SRC4194EVM Power Supply Configuration and Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Input Port External Connections and Configuration . . . . . . . . . . .
Chapter 1 This chapter provides a brief technical overview for the SRC4194 four-channel audio asynchronous sample rate converter, as well as a general description and feature list for the SRC4194EVM. Topic Page 1.1 SRC4194 Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 SRC4194 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.3 SRC4194EVM Features . . . . . . . . . . . . . . . . . . . . . . . . . . .
SRC4194 Product Overview 1.1 SRC4194 Product Overview The SRC4194 is a four-channel, asynchronous sample rate converter (ASRC), implemented as two stereo sections referred to as SRC A and SRC B. Operation at input and output sampling frequencies up to 212kHz is supported, with a continuous input/output sampling ratio range of 16:1 to 1:16. Excellent dynamic range and THD+N are achieved by employing high performance, linear phase digital filtering with better than 140dB of image rejection.
SRC4194 Functional Block Diagram 1.2 SRC4194 Functional Block Diagram Figure 1−1 shows a functional block diagram of the SRC4194. The SRC4194 is segmented into two stereo SRC sections referred to as SRC A and SRC B. Each section can operate independently from the other. Each section has its own set of configuration pins in Hardware mode, and its own bank of control and status registers in Software mode. SRC A and SRC B have identical operations.
SRC4194 Functional Block Diagram Figure 1−1.
SRC4194EVM Features 1.3 SRC4194EVM Features The SRC4194EVM provides a convenient platform for evaluating the performance and functionality of the SRC4194 product.
SRC4194EVM Functional Block Diagram 1.4 SRC4194EVM Functional Block Diagram The SRC4194EVM functional block diagram is shown in Figure 1−2. Besides the SRC4194, there are multiple audio input and output port interfaces, reference clock generation circuitry, switches for Hardware mode configuration and logic functions, and a buffered host port interface for communications with the SRC4194 SPI port when configured for Software mode operation.
Chapter 2 This chapter provides information regarding SRC4194EVM handling and unpacking, as well as absolute operating conditions. Topic Page 2.1 Electrostatic Discharge Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Unpacking the EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.3 Absolute Maximum Operating Conditions . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic Discharge Warning 2.1 Electrostatic Discharge Warning Failure to observe proper ESD handling precautions may result in damage to EVM components. Many of the components on the SRC4194EVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling procedures when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
Unpacking the EVM 2.2 Unpacking the EVM Upon opening the SRC4194EVM package, please check to make sure that the following items are included: - One SRC4194EVM - One printed copy of the SRC4194 data sheet - One printed copy of the SRC4194EVM User’s Guide If any of these items are missing, please contact the Texas Instruments Product Information Center nearest you to inquire about replacements.
Absolute Maximum Operating Conditions 2.3 Absolute Maximum Operating Conditions Exceeding the Absolute Operating Conditions may result in damage to the evaluation module and/or the equipment connected to it. The user should be aware of the absolute operating conditions for the SRC4194EVM. Exceeding these conditions may result in damage to the EVM and possibly the equipment connected to it. Table 2−1 summarizes the critical data points. Table 2−1. Absolute Operating Conditions MIN MAX UNIT +5V +4.
Chapter 3 This chapter provides hardware description and configuration information for the SRC4194EVM. Topic Page 3.1 Power Supply Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 SRC4194 Configuration Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 SRC4194 Hardware (or Standalone) Mode Configuration . . . . . . . . . . . . 3-4 SCR4194 Software Mode Configuration Via The Host Port . . . . . .
Power Supply Configuration 3.1 Power Supply Configuration Changes to settings for jumpers J15 through J17, as well as changes to the state of the REGEN element of switch SW2, should be performed with all power supplies connected to terminal block J14 powered off, thereby avoiding potential damage to the EVM and external components. The SRC4194EVM provides several options for power-supply configuration using onboard regulators and/or external supplies.
Power Supply Configuration Table 3−1. Common Configurations using a +5V Supply and an Optional EXT VIO Supply Description J15 J16(1) J17(1) REGEN (SW2) Core Voltage = +1.8V using onboard regulator (U33) — NC REG + 1.8V LO VIO = +1.8V using onboard regulator (U33) REG + 1.8V Core Voltage = +1.8V using onboard regulator (U33) — NC REG + 1.8V LO VIO = +3.3V using onboard regulator (U32) REG + 3.3V Core Voltage = +3.3V using onboard regulator (U32) — REG + 3.3V NC HI VIO = 3.
SRC4194 Configuration Modes 3.2 SRC4194 Configuration Modes The SRC4194 can be set to one of two configuration modes: Hardware (or Standalone) or Software (via a four-wire SPI port). The H/S element of switch SW2 is used to set the mode. Table 3−2 summarizes the H/S mode switch settings. Table 3−2. Setting the Configuration Mode 3.2.
IFMTx1 LO LO HI HI LO LO HI HI IFMTx0 LO HI LO HI LO HI LO HI LO LO LO LO HI HI HI HI IFMTx2 LO HI LO HI OFMTx0 LO LO HI HI OFMTx1 LO HI LO HI OWLx0 LO LO HI HI OWLx1 LO HI BYPx LO HI LO HI LRGPx0 LO LO HI HI LGRPx1 LO HI DDNx LO HI LO HI DEMx0 LO LO HI HI DEMx1 LO HI LO HI LO HI LO HI MODEx0 LO LO HI HI LO LO HI HI MODEx1 Table 3−3.
3.2.2 SRC4194 Software Mode Configuration Via The Host Port In Software mode, the SRC4194 relies upon an external host device to program the internal control registers via the four-wire SPI port. The SPI port is accessed using the Host Port header, connector J1. The header is buffered by U2, an octal buffer IC with tri-state outputs. The buffer outputs are enabled only when the H/S element of switch SW2 is set to the LO state. When H/S is HI, the buffer outputs are set to a high-impedance state.
Audio Input Ports 3.3 Audio Input Ports The SRC4192EVM includes four audio input ports, two each for the SRC A and SRC B sections of the SRC4194. Each section is provided with an AES3/SPDIF-compatible input, along with a buffered I/O header. Figure 3−2 illustrates the input port external connections and associated switch settings. Figure 3−2.
Audio Output Ports 3.4 Audio Output Ports The SRC4192EVM includes four audio output ports, two each for the SRC A and SRC B sections of the SRC4194. Each section is provided with an AES3/SPDIF-compatible output, along with a buffered I/O header. Figure 3−3 illustrates the output port external connections and associated switch settings. The SRC A section output port selection and Master/Slave mode operation are configured using switch SW6.
Audio Output Ports The DIT4192 transmitters (U7 and U17) have additional configuration switches, summarized in Table 3−4 and Table 3−5. For the clock divider, the corresponding control pins need to be set dependent upon the incoming master clock (MCLK) and output sampling rates, fSout. The master clock (MCLK) rate is set by either reference clock RCKIA or RCKIB, or by the corresponding DIT CLOCK input at connector J4 or J9 (dependent upon the clock configuration; see Figure 3−3 and Figure 3−4).
Reference Clock Generation 3.5 Reference Clock Generation The SRC4194EVM supports a flexible configuration for the SRC4194 reference clock generation. Figure 3−4 illustrates the PLL and clock connections used for the reference clocks. Both SRC A and SRC B have their own reference clocks, referred to as RCKIA and RCKIB, respectively. The reference clocks may be derived by onboard PLL clock generators (U25 and U28), or by external clock sources applied at connectors J12 and J13.
TDM Test Mode 3.6 TDM Test Mode Jumper J18 is provided to allow a simple onboard connection between SDOUTA (pin 64) and TDMIB (pin 52). This provides a test mode for evaluating the TDM output data format. When J18 is shorted, the TDMIB pin at header J7 should be floating, with no external connection.
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Chapter 4 ! " # ! $ This chapter provides the electrical schematic and physical layout information for the SRC4194EVM. The bill of materials is included for component and manufacturer reference. Topic Page 4.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 4.
Schematic 4.1 Schematic The electrical schematic for the SRC4194EVM is shown in Figure 4−1 and Figure 4−2. Descriptions of the components shown on the schematics are listed in Table 4−1.
1 2 3 4 5 6 7 8 9 10 SW2 SW1 VIO RN4 10K 20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 11 13 15 17 19 VIO A1 A2 A3 A4 G RST SW3 Y1 Y2 Y3 Y4 R1 10K VIO Schematic, PCB Layout, and Bill of Materials SN74ALVC244PW 9 7 5 3 U3B C1 0.01uF D1 RN5 10K RATIOA D2 /RDYA IFMTA0 IFMTA1 IFMTA2 OFMTA0 OFMTA1 OWLA0 OWLA1 BYPA LGRPA0 LGRPA1 DDNA DEMA0 DEMA1 MODEA0 MODEA1 MODEA2 RCKIA VIO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RN3 10K 0.
SN74LVC1G04DBV 0.1uF 2 C48 VIO R12 75 U27 4 VIO 0.01uF R11 0.01uF 75 C7 C6 J12 SRC A EXT CLOCK J11 AES IN B +5V 0.01uF R10 0.01uF 75 C5 C4 +5V 2 5 9 12 1 4 10 13 C16 10uF C15 10uF GND 1Y 2Y 3Y 4Y VCC 14 C17 10uF R13 75 0.1uF REG +3.
PCB Layout 4.2 PCB Layout The SRC4194EVM is a four-layer printed circuit board (PCB) with the following layer structure: - Layer 1: Top (Component Side) - Layer 2: Ground Plane - Layer 3: Power - Layer 4: Bottom (Solder Side) Figure 4−3 through Figure 4−8 show the top side silk screen, along with the top, ground plane, power, and bottom layers of the printed circuit assembly. Figure 4−3.
PCB Layout Figure 4−4.
PCB Layout Figure 4−5.
PCB Layout Figure 4−6.
PCB Layout Figure 4−7.
PCB Layout Figure 4−8.
0.1µF 4 Schematic, PCB Layout, and Bill of Materials J15−J17 J18 D1−D6 R8−R15 11 12 13 14 R4, R5 J14 10 120Ω J4, J9, J12, J13 9 15 J3, J6, J8, J11 8 75Ω J1, J2, J5, J7, J10 C82−C85 C8−C22, C78−C81 C23−C71 C72, C73 C1−C7 C74−C77 REFERENCE DESIGNATOR 7 100µF 0.068µF 3 6 0.01µF 2 10µF 27pF 1 5 VALUE ITEM 2 8 6 1 3 1 4 4 5 4 19 49 2 7 4 QTY PER BOARD Table 4−1.
4-12 5 1 6 6 SW1, SW2, SW4, SW5 SW6, SW8 SW3, SW7, SW9 U1 U2, U3, U6, U12, U16, U22 U4, U10, U20, U27, U30, U31 U5, U11, U15, U21 23 24 25 26 27 28 29 4 3 2 5 RN3, RN5, RN7, RN9, RN13 10kΩ 22 7 RN2, RN4, RN6, RN8, RN10, RN11, RN12 10kΩ 21 4 100Ω 20 RN16, RN17, RN19, RN20 100Ω 19 4 4 10kΩ 18 R16−R19 2 RN1, RN14, RN15, RN18 475Ω 17 R6, R7 QTY PER BOARD 3 150Ω 16 REFERENCE DESIGNATOR R1−R3 VALUE ITEM Texas Instruments Texas Instruments Texas Instruments Texa
U25, U28 U32 U33 X1, X2 35 36 37 38 2 1 1 2 2 4 U14, U24 34 2 40 U13, U23 33 4 4 U9, U19, U26, U29 32 2 2 QTY PER BOARD 39 U8, U18 31 REFERENCE DESIGNATOR U7, U17 VALUE 30 ITEM Samtec 3M Bumpon Citizen Texas Instruments Texas Instruments Texas Instruments Cirrus Logic Texas Instruments Texas Instruments Texas Instruments Texas Instruments MFG Table 4−1. SRC4194EVM Bill of Materials (continued) SNT−100−BK−G−H SJ−5003 HCM49−27.000MABJT REG1117A−1.8 REG1117−3.
