Datasheet

SRC4192, SRC4193

SBFS022B

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PIN COMPATIBILITY WITH THE ANALOG

DEVICES AD1896 (SRC4192 ONLY)

The SRC4192 is pin-and function-compatible with the AD1896

when observing the guidelines indicated in the following

paragraphs.

Power Supplies. To ensure compatibility, the VDD_IO and

VDD_CORE supplies of the AD1896 must be set to +3.3V,

while the V

and V

supplies of the SRC4192 must be set

to +3.3V.

Crystal Oscillator. The SRC4192 does not have an on-chip

crystal oscillator. An external reference clock is required at

the RCKI input (pin 2).

Reference Clock Frequency. The reference clock input

frequency for the SRC4192 must be no higher than 30 MHz,

in order to match the master clock frequency specification of

the AD1896. In addition, the SRC4192 does not support the

768f

reference clock rate.

Master Mode Maximum Sampling Frequency. When the

input or output ports are set to Master mode, the maximum

sampling frequency must be limited to 96kHz in order to

support the AD1896 specification. This is despite the fact that

the SRC4192 supports a maximum sampling frequency of

212kHz in Master mode. The user should consider building

an option into his or her design to support the higher

sampling frequency of the SRC4192.

Matched Phase Mode. Due to the internal architecture of

the SRC4192, it does not require or support the matched

phase mode of the AD1896. Given multiple SRC4192 de-

vices, if all reference clock (RCKI) inputs are driven from the

same clock source, the devices will be phase matched.