Datasheet

SRC4192, SRC4193
SBFS022B
23
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Register 2: Filter Control Register
LGRP Low Group Delay
This bit is used to select the number of input audio samples to be stored in the data buffer before the ASRC starts
processing the audio data.
LGRP Group Delay
0 Normal Delay, 64 samples. (Default)
1 Low Delay, 32 samples.
DFLT Decimation Filtering / Direct Down-Sampling
The DFLT bit is used to enable or disable the direct down-sampling function.
DFLT Decimation Filter Operation
0 Decimation Filter Enabled (Default)
(Must be used when f
sOUT
is less than f
sIN
)
1 Direct Down-Sampling enabled without filtering. (May be enabled when f
sOUT
is equal to or
greater than f
sIN
)
Register 3: Audio Data Format Register
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
0 0 0 0 0 0 DFLT LGRP
IFMT[2:0] Input Port Data Format
IFMT2 IFMT1 IFMT0 Input Format
0 0 0 24-Bit Left Justified (Default)
0 0 1 24-Bit I
2
S
0 1 0 - Not Used -
0 1 1 - Not Used -
1 0 0 Right Justified, 16-Bit Data
1 0 1 Right Justified, 18-Bit Data
1 1 0 Right Justified, 20-Bit Data
1 1 1 Right Justified, 24-Bit Data
OFMT[1:0] Output Port Data Format
OFMT1 OFMT0 Output Format
0 0 Left Justified (Default)
01I
2
S
1 0 TDM
1 1 Right Justified
OWL[1:0] Output Port Data Word Length
OWL1 OWL0 Output Word Length
0 0 24-Bits (Default)
0 1 20-Bits
1 0 18-Bits
1 1 16-Bits
Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB)
OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0