Datasheet

SRC4192, SRC4193
SBFS022B
21
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Byte 0 indicates the address of the control register to be
written. The two most significant bits are set to 0, while the
six least significant bits contain the control register address.
Byte 1 is a
dont care
byte. This byte is included in the
protocol in order to maintain compatibility with current and
future Texas Instruments digital audio products, including
the DIT4096 and DIT4192 digital audio transmitters. Byte 2
contains the 8-bit data for the control register addressed in
Byte 0.
As shown in Figure 8, a write sequence starts by bringing the
CS
input low. Bytes 0, 1, and 2 are then written to program
a single control register. Bringing the
CS
input high after the
third byte will write just one register. However, if
CS
remains
low after writing the first control byte, the port will auto-
increment the address by 1, allowing successive addresses
Byte 0 Byte 1
Byte N
Header
Set CS = 1 here to write one register or buffer location.
Keep CS = 0 to enable auto-increment mode.
CS
CDIN
CCLK
00000A2A1A0
MSB LSB
BYTE 0:
BYTE DEFINITION
Set to 0.
Register Address
Set to 0.
Byte 1: All 8 bits are Dont Care. Set to 0 or 1.
Bytes 2 through N: Register Data.
All Bytes are written MSB first.
Byte 2 Byte 3
Register or Buffer Data
t
CSCR
t
CDH
t
CDS
t
CFCS
CS
CCLK
CDATA
FIGURE 8. SPI Port Protocol.
FIGURE 9. SPI Port Timing.
to be written. The address is automatically incremented by 1
after each byte is written as long as the
CS
input remains
low. This is referred to as auto-increment operation, and is
always enabled for the SPI port.
CONTROL REGISTER MAP (SRC4193 ONLY)
The control register map for the SRC4193 is shown in Table
4. Register 0 is reserved for factory use and defaults to all
zeros upon reset. The user should avoid writing this register,
as unexpected operation may result if Register 0 is pro-
grammed to an arbitrary value. Registers 1 through 5 contain
control bits, which are used to configure the internal functions
of the SRC4193. All other register addresses are reserved
and should not be used in customer applications.
Register Address D7 D0
(Dec/Hex) (MSB) D6 D5 D4 D3 D2 D1 (LSB)
0 00 000000
1
PDN
TRACK 0 MUTE BYPAS MODE2 MODE1 MODE0
2 0 0 0 0 0 0 DFLT LGRP
3 OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0
4 AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0
5 AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0
TABLE 4. The SRC4193 Control Register Map.