Datasheet

SRC4190
SBFS023B
19
www.ti.com
Table 3 illustrates data format selection for the output port.
The OFMT0 (pin 19), OFMT1 (pin 18), OWL0 (pin 17), and
OWL1 (pin 16) inputs are utilized to set the output port data
format and word length.
OFMT1 OFMT0 OUTPUT PORT DATA FORMAT
0 0 Left Justified
01 I
2
S
1 0 TDM
1 1 Right Justified
OWL1 OWL0 OUTPUT PORT DATA WORD LENGTH
0 0 24 Bits
0 1 20 Bits
1 0 18 Bits
1 1 16 Bits
TABLE 3. Output Port Data Format Selection.
BYPASS MODE
The SRC4190 includes a bypass function, which routes the
input port data directly to the output port, bypassing the
ASRC function. Bypass mode may be invoked by forcing the
BYPAS input (pin 9) high. For normal ASRC operation, the
BYPAS pin should be set to 0.
No dithering is applied to the output data in bypass mode;
digital attenuation and mute functions are also unavailable in
this mode.
SOFT MUTE FUNCTION
The soft mute function of the SRC4190 may be invoked by
forcing the MUTE input (pin 14) high. The Soft mute function
slowly attenuates the output signal level down to all zeroes
plus ±4LSB of dither. This provides an artifact-free muting of
the audio output port.
READY OUTPUT
The SRC4190 includes an active low ready output named
RDY (pin 15). This is an output from the rate estimator block,
which indicates that the input-to-output sampling frequency
ratio has been determined. The ready signal can be used as
a flag or indicator output. The ready signal can also be
connected to the active high MUTE input (pin 14) to provide
an auto-mute function, so that the output port is muted when
the rate estimator is in transition.
APPLICATIONS INFORMATION
This section of the data sheet provides practical applications
information for hardware and systems engineers who will be
designing the SRC4190 into their end equipment.
RECOMMENDED CIRCUIT CONFIGURATION
The typical connection diagram for the SRC4190 is shown in
Figure 8. Recommended values for power supply bypass
capacitors are included. These capacitors should be placed
as close to the IC package as possible.
LGRP
RCKI
NC
SDIN
BCKI
LRCKI
V
IO
DGND
BYPAS
IFMT0
IFMT1
IFMT2
RST
MUTE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SRC4190
Audio Input
Device
Reference
Clock
From/To
Control
Logic
V
DD
= +3.3V
10µF
MODE2
MODE1
MODE0
BCKO
LRCKO
SDOUT
V
DD
DGND
TDMI
OFMT0
OFMT1
OWL0
OWL1
RDY
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Audio Output
Device
0.1µF
To Pin 22
To Pin 21
V
IO
= +1.65V to V
DD
0.1µF10µF
To Pin 7
To Pin 8
From
Control
Logic
FIGURE 8. Typical Connection Diagram for the SRC4190.