Datasheet

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SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007
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35
INTERFACING TO DIGITAL AUDIO
RECEIVERS AND TRANSMITTERS
The SRC4184 input and output ports are designed to
interface to a variety of audio devices, including receivers
and transmitters commonly used for AES/EBU, S/PDIF,
and CP1201 communications. Texas Instruments
manufactures the DIR1703 digital audio interface receiver
and DIT4096/4192 digital audio transmitters to address
these applications.
Figure 13 illustrates interfacing the DIR1703 to the
SRC4184 input port. The DIR1703 operates from a single
+3.3V supply, which requires that the V
IO
supply (pin 56)
for the SRC4184 to be set to +3.3V for interface
compatibility.
DIR1703
LRCKO
BCKO
DATA
SCKO
LRCKI
BCKI
SDIN
SRC4184
RCLI
Clock
Select
Assumes V
IO
= +3.3V for SRC4184
Clock
Generator
RCV DIN
AES3, S/PDIF
Input
RS−422
Receiver
Figure 13. Interfacing the SRC4184 to the
DIR1703 Digital Audio Interface Receiver
Figure 14 shows the interface between the SRC4184
output port and the DIT4096 or DIT4192 audio serial port.
Once again, the V
IO
supplies for both the SRC4184 and
DIT4096/4192 are set to +3.3V for interface compatibility.
SRC4184
LRCKO
BCKO
SDOUT
RCKI
SYNC
SCLK
SDATA
DIT4096, DIT4192
MCLK
Clock
Select
Assumes V
IO
= +3.3V for SRC4184 and DIT4096, DIT4192
REF Clock
Generator
DIT Clock
Generator
TX+
TX
−
AES3, S/PDIF
OUTPUT
Figure 14. Interfacing the SRC4184 to the
DIT4096/4192 Digital Audio Interface Receiver
Like the SRC4184 output ports, the DIT4096 and DIT4192
audio serial port may be configured as a Master or Slave.
In cases where the SRC4184 output port is set to Master
mode and the DIT4096/4192 is configured as the Slave, it
is recommended to use the reference clock source for the
corresponding section of the SRC4184 as the master
clock source for the DIT4096/4192. This will ensure that
the transmitter audio serial port clocks, SYNC and SCLK,
are synchronized to the master clock source.